Slow register access on the i.MX6 Quad

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Slow register access on the i.MX6 Quad

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philipp_klemm
Contributor I

Hello,

we have a custom board with an i.MX6 Quad running QNX.
During driver development we noticed that register access seems to be quite slow.
The periperial clock is set to 66MHz, which results in a period of approx. 15ns. However, accessing a register e.g. the FIFOs of the ECSPI module takes approx. 300ns, which ich about 20 times slower that the clock.

Furthermore, this does not seem to be a QNX only issue, since measurements in the bootloader (Uboot) provide the same results.


We tried to increase the periperial clock (IPG_CLK_ROOT) by setting the prescaler (IPG_PODF) to 1, but the effect was minimal (approx 270-280ns).
Also, this is not limited to the ECSPI registers (i tried several others of different modules).

Can anyone reproduce these timings or does of any settings (e.g. to the MMU) we missed?


Thank you,

Philipp Klemm

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Philipp

additional latencies are produced by NIC-301 (Network Inter-Connect) AXI arbiter,

described in Chapter 45 Network Interconnect Bus System (NIC-301) i.MX6DQ Reference Manual
https://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf

in general one can look at suggestions on

https://community.nxp.com/message/920894?commentID=920894#comment-920894 

Best regards
igor
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