We already have a display 1920x1080 with a single channel LVDS with LVDS clock 135.2 ... 160 MHz. Programming this frequency we only measure the half clock on the clock output pins. Just programming the iMX6Q ldb_di0_ipu_div bit in the CCM_CSCMR2 register to "0" does not change the LVDS frequency.
Does anyone have an idea to program a high frequency LVDS single channel output like this?
Thanks Stefan. Yes, it is, what we see. This panel ist outside the TI FPD spec and will never work with iMX6. Just the iMX6 documentation let us think it could work, but this higher clock is just used internally for the dual channel engine.
the maximum clock for single channel LVDS output is 85MHz. So you cannot use this display with the i.MX6.
The solution is to use both LVDS channels in split mode. But then you need also a display with dual channel LVDS interface!
Are you using linux? If so, what boot args are you using to setup the LDB?
You probably need to check LDB_CTRL bit 4 and make sure it's '0', and then enable the appropriate channel (ch 0 or ch 1).