Hi all,
We are trying to enable both ethernet ports on a i.MX6 ULL EVK board. After applying the following fix, we were able to use ethernet1, but ethernet0 is still down.
> + } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
> + phy_write(dev, 0x1f, 0x8190);
> + phy_write(dev, 0x16, 0x202);
> + }(see https://patchwork.kernel.org/project/linux-arm-kernel/patch/1437122304-20598-3-git-send-email-b38611...)
We are using U-Boot 2017.03-imx_v2017.03_4.9.88_2.0.0_ga
We retrieved the following PHY registers values in uboot:
imx6ull
ethernet0 (fec1) 0x02188000 0x4000 rmii ethphy0 @2
ethernet1 (fec2) 0x020b4000 0x4000 rmii ethphy1 @1 MDIO
PHY at address 1 (ethernet1):
0 - 0x1100
1 - 0x786d
2 - 0x22
3 - 0x1561
4 - 0x81e1
5 - 0xc1e1
6 - 0xf
7 - 0x2001
8 - 0x4fd5
PHY at address 2 (ethernet0):
0 - 0x500 => bit 10 = Electrical isolation of PHY from MII/RMII
1 - 0x7849
2 - 0x22
3 - 0x1561
4 - 0x8061
5 - 0x0
6 - 0x4
7 - 0x2001
8 - 0x0
The control register (0) for PHY at address 2 indicates that the PHY is electrically isolated. This register is supposed to be readable/writable but clearing bit 10 of register 0 directly does not work.
It looks like the bit is set by the ISO strapping pin (see https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/00002202C... ) and locked, how can we avoid that?
Is the problem fixed in more recent u-boot versions? If yes, can you provide the version to use?
Thanks,
Ayoub