Hi! Support,
Recently we discovered a strange issue with our own i.MX6 quad board which is similar to sabresd. The OS we ported is Linux 3.14.28 and everything looks fine except we could not successfully reboot the board when we issued the reboot command on console. In our design, we skip WDOG_B circuitry and let it float on GPIO_1 (WDOG_B). However, we have to define
&gpc {
/* use ldo-bypass, u-boot will check it and configure */
// fsl,ldo-bypass = <1>;
// fsl,wdog-reset = <2>;
fsl,wdog-reset = <1>;
};
and
&wdog2 {
status = "okay";
// status = "disabled";
};
in our device tree to make this board successfully booted.
If we issue "reboot" on console, then the board would be started and hangs at starting kernel. Also, the board is restarted after running up to the following section in mxc_restart in system.c without going through the whole part.
__raw_writew(wcr_enable, wdog_base); | |
pr_err("mxc_restart step 3\n"); | |
/* | |
* Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be | |
* written twice), we add another two writes to ensure there must be at | |
* least two writes happen in the same one 32kHz clock period. We save | |
* the target check here, since the writes shouldn't be a huge burden | |
* for other platforms. | |
*/ | |
__raw_writew(wcr_enable, wdog_base); | |
__raw_writew(wcr_enable, wdog_base); |
DO you have any suggestion we could eliminate this soft reboot issue?
Vincent
Solved! Go to Solution.
If you use WDOG1, you can use below cfg.
&gpc {
fsl,wdog-reset = <1>;
};
and
&wdog2 {
status = "disabled";
};
&wdog1 {
status = "ok";
};
It should can reboot through WDOG1.
If you want to use WDOG2, you need to check your HW design carefully. Once WDOG2 enable WCR signal, WDOG_B should be triggered to notify CPU.
Hi! Mr. Hong,
No, we still have issues about setting WDOG_B. Is it related to the extra LDO on Sabresd Board?
Vincent
If you use WDOG1, you can use below cfg.
&gpc {
fsl,wdog-reset = <1>;
};
and
&wdog2 {
status = "disabled";
};
&wdog1 {
status = "ok";
};
It should can reboot through WDOG1.
If you want to use WDOG2, you need to check your HW design carefully. Once WDOG2 enable WCR signal, WDOG_B should be triggered to notify CPU.
Hi Vincent
for reliable board reset wdog should reset also pmic (using pwron), as it is done
on sabre schematic spf-27392 p.21 U507 buffer.
Best regards
igor
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Hi! Igor,
Assuming we could not make another batch of new boards to fix this issue, is there anyway we could skip this problem or lessen the impact?
Vincent
Hi Vincent
one can try to use ldo on (disable ldo-bypass) configuration.
Best regards
igor
Hi! Igor,
Yes, that is exactly we did in the device tree to disable ldo-bypass. When we did that, the board could boot. The problem is that it hangs when we issue "reboot" command on console. Any suggestion?
Vincent
Hi! Igor,
In addition to the following modification I made in imx6qdl-sabresd.dtsi
----
&gpc {
/* use ldo-bypass, u-boot will check it and configure */
// fsl,ldo-bypass = <1>;
// fsl,wdog-reset = <2>;
fsl,wdog-reset = <1>;
};
---
Is there any other steps I should do to disable ldo-bypass?
Vincent
have you fixed your issu, Vincent?