SabreSD: "reset" from u-boot hangs when wdog initialized in u-boot

[hafizabdul_kari]

For our specific use case , we need to initialize wdog in u-boot.

As wdog2 is enabled for sabreSD
https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm/boot/dts/imx6qdl-sabresd.dtsi?h=i...
So i initalized wdog2 in u-boot with the following change set.

diff --git a/common/bootm.c b/common/bootm.c
index 3adbceaa38..340f40b4e2 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -28,6 +28,7 @@
 #include <command.h>
 #include <bootm.h>
 #include <image.h>
+#include <watchdog.h>
 
 #ifndef CONFIG_SYS_BOOTM_LEN
 /* use 8MByte as default max gunzip size */
@@ -632,6 +633,7 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
        int ret = 0, need_boot_fn;
 
        images->state |= states;
+       hw_watchdog_init();
 
        /*
         * Work through the states and see how far we get. We stop on

diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
index 14cc618074..f628983647 100644
--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -17,7 +17,7 @@
 void hw_watchdog_reset(void)
 {
 #ifndef CONFIG_WATCHDOG_RESET_DISABLE
-       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG2_BASE_ADDR;
 
        writew(0x5555, &wdog->wsr);
        writew(0xaaaa, &wdog->wsr);
@@ -26,7 +26,7 @@ void hw_watchdog_reset(void)
 
 void hw_watchdog_init(void)
 {
-       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG2_BASE_ADDR;
        u16 timeout;
 
        /*
@@ -50,7 +50,7 @@ void hw_watchdog_init(void)
 
 void __attribute__((weak)) reset_cpu(ulong addr)
 {
-       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+       struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG2_BASE_ADDR;
 
        clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE);

 But when trying to reset u-boot , with "reset" u-boot command. Target hangs.

[hafizabdul_kari]

Ok. initializing WDOG1 instead of WDOG1 resolves this issue.
Thank you @JasonLiu @xinyu_chen @igorpadykov  for all your support.

[JasonLiu]

@hafizabdul_kari , for the i.MX6Q/DL, there are 2 watchdogs, named wdog1 and wdog2. But the 2 wodgs are a little bit different.

The following information From the RM: only wdog1 connected with SRC and then result in Software Reset of the chip. Both wdog1 and wdog2 can toggle the WDOG_B pin. If the WDOG_B pin on the PCB board connect with PMIC, it can trigger the system reset. On i.MX6Q SabreSD board, the WDOG_B (wdog2)  connect with PMIC, so if you want to use WDOG_B(wdog2) to trigger the reset, please configure the iomux IOMUXC_SW_MUX_CTL_PAD_GPIO01 to enable the WDOG2_B in u-boot. With NXP default BSP, the U-Boot uses the WDOG1 Software reset.

[xinyu_chen]

Basically, the WDOG can only be configured once after reset, some of the registers like WDE/WDW is write-once bit. So, customer must configure the WDOG in uboot, but keep configure registers untouched during kernel boot, and do not suspend/disable WDOG in uboot.

Also, WDOG_B reset signal is another consideration if customer board use it. WDOG1/2 has different external reset pin, need re-configure for their cases.

[igorpadykov]

Hi hafizabdul_kari

one can look at baremetal wdog example:

https://github.com/RT-Thread/rt-thread/blob/master/bsp/imx6sx/iMX6_Platform_SDK/sdk/drivers/wdog/tes...

For reliable reset it is necessary to use solution as in i.MX6Q Sabre SD

board  schematic spf-27392 p.21 where WDOG_B is connected to PMIC PWRON

(through U507), so reset will shortly remove all power from board.

Design files, including hardware schematics, Gerbers, and OrCAD files for i.MX 6Quad (i.MX 6Dual emu...

Best regards
igor