SRC_GPR1 (0x020D8020) usage question (iMX6)

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SRC_GPR1 (0x020D8020) usage question (iMX6)

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lukaszmajewski
Contributor III

Dear All,

I'm a bit puzzled with the purpose of SRC_GPRx registers on iMX6Q SoC.

According to the iMX6Q Applications Processor Reference Manual (IMX6DQRM.pdf rev.4):

Chapter 60.7.7 (page 5088), there is a NOTE:

"This register is used by the ROM code and should not be used
by application software."

Could somebody explain what are the restrictions of using those registers? (SRC_GPRx)

What I've understood from the above manual:

Those registers keep their content during reset, so can be used as a storage of the boot count (from u-boot bootloader).

However, those may be as well overwritten with resume address and arguments when we go into deep power down mode(s).

Similar question has been posed in:iMX6 persistent data storage , but with no reply.

My questions:

1. Is it possible to reuse those registers in user application, which requires preserving data over (WDT, soft) reset?

2. Are there any other recommended registers for such purpose?

I've found SNVS_LPGPR (0x020CC068) - Chapter 57.9.14, which can be used in user application, but is recommended for retaining data in low-power mode(s).

Thread with SNVS_LPGPR usage example: https://community.nxp.com/docs/DOC-93964 

Thanks in advance for help,

Łukasz Majewski

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4 Replies

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Lukasz

ROM uses some SRC_GPR registers for saving return address from low power modes, please refer to

Table 4-7. Persistent Bits IMX6DQ6SDLSRM_RevD.pdf on

Q&A: How is mx6 PMIC_ON_REQ under SW control? 

Also uboot uses some of them:

How to Support Recovery Mode for POR Reboot Based on i.MX6 Android R13.4.1 

Best regards
igor
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lukaszmajewski
Contributor III

Hi Igor,

Thanks for the reply. 

The security reference manual states it clearly that I cannot write any random value to SRC_GPRx registers.

However,  the scenario:

- I do use SRC_GPRx register to store bootcount (with some magic - e.g. 0xB0010002)

- I do boot till user space

- When SoC goes to power down mode those registers will be overwritten (in Linux) with proper return values

- We go to sleep

- Wakeup source is received - then BootROM uses those values to start CPUs (and bootloader is not executed)

For this particular scenario it should work?

Also in my case I do not have the battery on my PCB, so SNVS_LPGPR behaves in the same way as SRC_GPRx registers - it persists its content for WDT reset, but is cleared after POR.

Please correct me if I'm wrong, but it seems safer for me to use SNVS_LPGPR register.

Best regards,

Łukasz

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Lukasz

yes for this described particular scenario it should work.

Best regards
igor

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lukaszmajewski
Contributor III

Hi Igor,

I think that I will use SNVS_LPGPR register - as I do need only single 32 bit word.

Moreovery, this register seems NOT to be used by BootROM, so shall be a safer choose.

Thanks for help,

Best regards,

Łukasz

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