SPI chip select configuration in IMX8M Nano processor

[Maishalini]

In IMX8M Nano processor (MIMX8MN5DVTJZAA )  it is possible to configure any GPIO pin for SPI Chip select ?

[Sanket_Parekh]

Hello @Maishalini ,

I hope you are doing well.

->One just needs to change the IOMUX setting for the SPI's CS pin to the GPIO pin.
->Please refer to this location in the linux source code to do the changes for the same.
<Linux_src_code>/Documentation/devicetree/bindings/spi

->One can refer to this link for reference to do pin configuration.
https://community.nxp.com/t5/i-MX-Processors/Native-chip-select-support-on-spi-fsl-lpspi-c/m-p/10115...

->I have shared an example for reference one can refer to that too.
&ecspi1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spi1>;
        status = "okay";
        cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio3 2 GPIO_ACTIVE_LOW>;
        #address-cells = <1>;
        #size-cells = <0>;

        spidev: spidev@0 {
                compatible = "spidev";
                status = "okay";
                spi-max-frequency = <5000000>;
                reg = <0>;
        };
};

I hope this information helps you!

Thanks & Regards,

Sanket Parekh