I observe similiar problem on i.mx6ul.
When I am using pin from GPIO4 group as CS it is working fine, however pin from GPIO2 group is broken.
My traces are showing that during spi_bitbang_start CS pin is set as output and toggled and later it is acquired from pinmux with devm_gpio_request.
Other driver from NXP: spi-fsl-lpspi.c have this sequence correct (allocate pin and then toggling).
How you can check if this is the same problem for you:
Add following printk in bgpio_set_set in your kernel code in gpio-mimo.c:
printk("%s called: base: %08x, gpio: %d, gc->reg_dir: %08x, gc->bgpio_dir: %08x\n", __func__, gc->base, gpio, gc->read_reg(gc->reg_dir), gc->bgpio_dir);
in case you will see mismatch between gc->reg_dir and gc->bgpio_dir it means you have similiar issue.
Here is my log:
bgpio_set_set called: base: 00000020, gpio: 15, gc->reg_dir: 00000000, gc->bgpio_dir: 00008000
Best Regards,
Łukasz Płachno