I am currently developping a product based on the IM.X RT 106x devices (more specifically on a 1062) and using a BSP package running on the IMX RT 1060 EVKB board from Emcraft as the base for our design.
The current design step I am involved in involves using the SNVS module to store / securely access a master key from the DCP module.
My current issue concerns the proper initialization of the SNVS module.
As I am not the one having written all initialization steps in U-boot, I am currently facing an issue where it seems that I am stumbling on a SNVS device that has already been initialized and where the HP part is stuck in a "NON-SECURE" state because the SW_SV bit of the HPCOMR has been set to 1. However, while searching in the u-boot code compiled for the board I do not seem to be able to find the part of the code that would execute such an initialization.
I therefore am wondering whether inproper IOMUXC, PMU, GPC or CCM register settings might put the module in such a state and, if yes, what are those that I should be checking in order to evaluate this?
It is to be noted that the Real Time Clock provided by the block seems to be working ok.
As a piece of information, here is the current state of the SNVS I can get reading the different registers:
400d4000: 00000000 80002100 00000000 00000000 .....!..........
HPCOMR 80002100 (NPSWA_EN=1, PROGZMK=1, SW_SV=1)
400d4010: 00000000 80009b00 80002000 00000000 ......... ......
HPSR: 80009b00 (ZMK_ZERO=1, SYS_SECURE_BOOT=1, SYS_SECURITY_CFG = 001 - open cfg)
HPSVSR: 80002000 (LP_SEC_VIO=1, after LP POR, I initialized the LPLVDR register at adress 0x400D4064 and ordered a reset of the LP part but this bit does not seem to be cleared, even after HP POR, SW_SV is asserted)
400d4020: 00000000 00000000 00000000 00000000 ................
400d4030: 00000000 00000000 00000020 00000000 ........ .......
LPCR : 00000020 DP_EN set to 1 (reset value)
400d4040: 00000000 00000000 00000000 00000008 ................
LPSR 00000008: LVD is set to 1 and does not reset after HP POR
400d4050: 00000000 00000000 00000000 00000000 ................
400d4060: 00000000 41736166 00000000 00000000
LPLVDR: 41736166 default value written to register to detect LP Voltage drop
400d4070: 00000000 00000000 00000000 00000000 ................
400d4080: 00000000 00000000 00000000 00000000 ................
400d4090: 00000000 00000000 00000000 00000000 ................
400d40a0: 00000000 00000000 00000000 00000000 ................
400d40b0: 00000000 00000000 00000000 00000000 ................
400d40c0: 00000000 00000000 00000000 00000000 ................
400d40d0: 00000000 00000000 00000000 00000000 ................
400d40e0: 00000000 00000000 00000000 00000000 ................
400d40f0: 00000000 00000000 00000000 00000000 ................
