SNVS_LPCR - reserved bits in rev2 of the ref manual?

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SNVS_LPCR - reserved bits in rev2 of the ref manual?

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Contributor I

Why are LPTA_EN and SRTC_ENV in the SNVS_LPCR register marked as reserved in rev2 of the imx6 reference manual? We are seeing something similar to this issue https://community.freescale.com/thread/321053 and are interested in those registers.

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Community Manager
This an automatic process.

We are marking this post as solved, due to the either low activity or any reply marked as correct.

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NXP Community!

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Community Manager
This an automatic process.

We are marking this post as solved, due to the either low activity or any reply marked as correct.

If you have additional questions, please create a new post and reference to this closed post.

NXP Community!

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NXP TechSupport
NXP TechSupport

This is just the documentation issue. The reason is that the part of the SNVS_LPCR register fields, related with security features, is described in the i.MX6 Security Reference Manual, whereas the part of the fields, related with some common features, is described in the i.MX6Q Reference Manual. Both documents are available on the i.MX6Q Documentation web page:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6Q&fpsp=1&tab=Documentation_Tab

All of the fileds, described in these two documents, are valid and operational. Just concatenate these descriptions, and you will get the complete register description.


Have a great day,
Artur

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