SI configuration in DDR Stress test

[srinivasaporam]

Hi,

Can anybody tell me how the SI configuration bits need to be selected correctly, so that i will generate correct .inc file.

DRAM DSE Setting - DQ/DQM (ohm)

DRAM DSE Setting - ADDR/CMD/CTL (ohm)

DRAM DSE Setting - CK (ohm)

DRAM DSE Setting - DQS (ohm)

selecting them in trial and error method will be tedious.

[igorpadykov]

Hi Srinivasa

one can find in which direction to change drive strength,

slightly changing temperature. If cooling down the part causes more failures,

then it is likely the drive strength is too high causing more overshoots and undershoots.

If heating up the part causes more failures, then the drive strength is too low

and the signals may not rise/fall fast enough.

Best regards

igor

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