SGTL5000 internal regulator for VDDD.

[satoshishimoda]

Hi community,

I have some questions about SGTL5000 internal regulator.

Please see Table 31 in SGTL5000 datasheet.

[Q1]

According to the reset values of LINREG_SIMPLE_POWERUP and LINREG_D_POWERUP, VDDD output automatically immediatelly after VDDIO or VDDA.

Is this correct?

[Q2]

Which power supply (VDDIO or VDDA) is power source of internal regulator for VDDD?

[Q3]

Could you let me know your reccomendataion for SGTL5000 power up sequence?

(e.g. supply VDDIO/VDDA -> internal regulator generates VDDD -> turn off internal regulator for VDDD via I2C -> supply external VDDD -> supply SYS_MCLK)

[Q4]

Do you have a block diagram about internal regulator for VDDD?

I think it helps us to understand internal regulator for VDDD.

Best Regards,

Satoshi Shimoda

[reyes]

Hi Satoshi Shimoda,

First of all, as mentioned in the ER1 on the errata document (http://cache.freescale.com/files/analog/doc/errata/SGTL5000ER.pdf), it is recommended to use an external supply in the system or a separate regulator to supply VDDD for new design since on some very rare combinations of parts and application boards (for all the silicon revisions), and on a very small percentage of those rare part/board combinations, sometimes the VDDD internal regulator does not start up after IC power-up.

So, please use an external regulator for VDDD.

[A1]Both, VDDA and VDDIO are supplied externally and need to be supplied every time the SGTL5000 is running.

[A2] I’m not sure, however, as mentioned it is recommended to use an external supply for VDDD and turn off the internal VDDD regulator.

[A3] Please take a look at section 2.2.1 of the Application note AN3663, in this section is mentioned the recommended power-up sequence/initialization depending on the configuration.

AN3663: http://cache.freescale.com/files/analog/doc/app_note/AN3663.pdf

[A4] Unfortunately no, however, it is not needed since the recommendation now it’s to supply VDDD externally.

Regards,

Jose

[satoshishimoda]

Hi Jose,

Thank you for your reply.

> [A1]Both, VDDA and VDDIO are supplied externally and need to be supplied every time the SGTL5000 is running.

Sorry, I did not understand your meaning of the answer.

I want to know whether VDDD output automatically immediately after VDDIO or VDDA.

In other words, I want to know whether I can prevent VDDD output which is generated by internal regulator before supply external VDDD.

> [A3] Please take a look at section 2.2.1 of the Application note AN3663, in this section is mentioned the recommended power-up sequence/initialization depending on the configuration.

I checked section 2.2.1 of AN3663, then I think the application note mentions how to initialization of the SGTL5000 via I2C after power supplies, right?

Actually, I want to know the recommendation of power supply sequence, and when should I change ON/OFF the VDDD generated by internal regulator.

According to your reply, should I set CHIP_ANA_POWER register after all power and clock are supplied?

(supply VDDIO/VDDA -> internal regulator generates VDDD immediately -> supply external VDDD -> supply SYS_MCLK -> turn off internal regulator for VDDD via I2C ?)

Best Regards,

Satoshi Shimoda

[reyes · Accepted solution]

Hi Satoshi Shimoda,

[A2-1] You cannot prevent VDDD output, it will be set automatically after you run the SGTL5000, but it will not cause any problem, you can disable this VDDD output after reset if VDDD is coming from an external source by clearing (write 0x0) to LINREG_SIMPLE_POWERUP (bit 13) and STARTUP_POWERUP (bit 12) on Register CHIP_ANA_POWER (0x0030).

[A2-3] Yes, correct, you should set CHIP_ANA_POWER register after all power and clock are supplied (supply VDDIO/VDDA -> internal regulator generates VDDD immediately -> supply external VDDD -> supply SYS_MCLK -> turn off internal regulator for VDDD via I2C).

Regards,

Jose

[jamesbone]

reyes, TomasVaverka.  Can you please comment on this topic?