SDMA I2C in iMX7S M4 Core

[haroldvanderpoo]

The byte by byte interrupt provided by the standard iMX7 I2C peripheral is not providing the performance we require for our real time function.  We are using MQX for RTOS in M4 core.  This prompts a couple of questions we have been unable to answer from the documentation: (partial answers from some of NXP team (Rob Oshana and Zening Wang) via our Arrow FAE noted below)

1. Does iMX7S hardware support bi-directional SDMA for I2C peripheral? - Yes Apps team has shown it is possible on A Core with linux.
2. Can SDMA function be shared across both the A7 core and the M4 core?  It looks like the stock spi and sd card linux drivers out of the box use SDMA in the freescale imx distribution.
3. Are there any example of SDMA utilized by the M4 core?

Thanks for any assistance.

[CarlosCasillas]

Hi Harold,

Unfortunately, there are not examples for SDMA on Cortex M4, that peripheral is delegated to Cortex-A on the BSPs.

Hope this will be useful for you.
Best regards!
/Carlos
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

-------------------------------------------------------------------------------