SAI1_TX_DATA4 & SAI1_TX_DATA5 no output issue

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SAI1_TX_DATA4 & SAI1_TX_DATA5 no output issue

117 Views
Contributor I

Hi Supporter,

When I use SAI1_TX_DATA0 & SAI1_TX_DATA1 as SAI TX data output. It works well.
When I use SAI1_TX_DATA2 & SAI1_TX_DATA3 as SAI TX data output. It also works well.
But when I use SAI1_TX_DATA4 & SAI1_TX_DATA5 as SAI TX data output. It does not work. There is no any signal when I measure it.
Please help to check and advise.

PS:
1. Processor is i.MX8MM and it is customer board.
2.
Command list:
speaker-test -Dplughw:0,0 -FS16_LE -c8 -r48000 -t wav=/usr/share/sounds/alsa/
3.
Device tree:
sound-ad193x {
compatible = "simple-audio-card";
simple-audio-card,name = "ad193x-audio";
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&cpudai>;
simple-audio-card,bitclock-master = <&cpudai>;
simple-audio-card,mclk-fs = <256>;

cpudai: simple-audio-card,cpu {
sound-dai = <&sai1>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
};

simple-audio-card,codec {
sound-dai = <&ad193x_ecspi2>;
clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
};
};


pinctrl_sai1: sai1grp {
fsl,pins = <
MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6
MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6
//MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2 0xd6
//MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3 0xd6
//MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6
//MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1 0xd6
MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5 0xd6
>;
};

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6 Replies

90 Views
NXP TechSupport
NXP TechSupport

Suspect there is no clocking associated with the mixer directly. The clocking is determined by the SAI sources, that must match regards sample rate and number of channels in the TDM frame.

 

pastedImage_1.png

 

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80 Views
Contributor I

Hi @jamesbone ,

I am afraid there seems to have been a slight misunderstanding.

We are using SAI1, not SAI4 or SAI5.

Please help to check and advise,thanks.

 

Regards,

Kenny

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71 Views
NXP TechSupport
NXP TechSupport

For sai multi lane example one can look at pinctrl_sai1 :

fsl-imx8mm-evk.dts\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel

Special attention to the

fsl,sai-multi-lane;

fsl,dataline,dsd = <0 0xff 0xff 2 0xff 0x11


Pay attention to sect.13.9.3.5.4 FIFO Combine i.MX8M Mini Reference Manual:
"FIFO combining mode allows the separate FIFOs for multiple data channels to be used as
a single FIFO for either software accesses or a single data channel or both. Note that the
enabled data channels must be contiguous and data channel 0 must be enabled when
FIFO Combine mode is enabled."

 

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62 Views
Contributor I

Hi @jamesbone ,

We didn't enable FIFO combining mode.

When we only setting SAI1_TX_DATA2 & SAI1_TX_DATA3 in device tree as SAI TX data output(not enable data channel 0) It also works well.

if we modify device tree : SAI1_TX_DATA2 & SAI1_TX_DATA3 switch to SAI1_TX_DATA4 & SAI1_TX_DATA5.It does not work

Please help to check and advise.

sai1 setting :

&sai1 {
pinctrl-names = "default", "dsd";
pinctrl-0 = <&pinctrl_sai1>;
pinctrl-1 = <&pinctrl_sai1_dsd>;
assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <12288000>;
clocks = <&clk IMX8MM_CLK_SAI1_IPG>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_SAI1_ROOT>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
<&clk IMX8MM_AUDIO_PLL2_OUT>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
//fsl,sai-multi-lane;
//fsl,dataline,dsd = <0 0xff 0xff 2 0xff 0x11>;
//dmas = <&sdma2 0 25 0>, <&sdma2 1 25 0>;
status = "okay";
};

Regards,

Kenny

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19 Views
NXP TechSupport
NXP TechSupport

Using the higher data lanes SAI1_TX_DATA4/5 may use other FIFO's than the ones used by SAI1_TX_DATA0/1/2/3, which might be the reason there is no output on just commenting out the lines in the device tree.

 

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97 Views
Contributor I

Hi Supporter,

 

Any update?

 

Regards,

Kenny

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