SAI questions for i.MX8M Plus

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SAI questions for i.MX8M Plus

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jimmyli
Contributor IV

Hi,

     We are designing our production with i.mx8m plus, and some questions about sai that hope you can help us to check them.

     1>block diagram

         jimmyli_0-1681439899185.png

     2>questions

     a. sai master mode in i.mx8m plus #1(sai1+sai2+sai5), how to config the external clk to mclk ?

         does it has special requirement for external clk ?

     b. sai slave mode in i.mx8m plus #2(sai5), does it support ? if yes, how to config?

 

Thanks very much.

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josephlinares
NXP TechSupport
NXP TechSupport

Hi, Jimmy

I've checked that the Master Clock is added for oversampling and its sources can be internal references with fractional dividers (this is the cost-effective option) and external oscillators, that I think that may reduce your costs (to maximize performance) and is an optional signal to the slave.

The masterclock has to be a multiple of the different frequencies used for example in a same SAI both duplex and I think that that matches to different SAIs with both duplex.

I think that the BD can be simplified to a simple oscillator in the master clock source and its distribution can be simplified removing the slave master feeding.

To enable clocks, I found a document that contextualize different things, the answer is to modify the register SAI Receive Configuration 2 Register (RCR2) and to enable the pin muxing desired using config tools. Read the document as a design guide with the interface https://www.nxp.com/docs/en/application-note/AN12202.pdf

Thank you! Hope this helps

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jimmyli
Contributor IV

Hi josephlinares,

      Thanks for the helpful message.

      We will try and update if any unclear.

 

      Thanks again.

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josephlinares
NXP TechSupport
NXP TechSupport

Hi,

I'm pleased to hear it, please update

Regards

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