SAI MCLK as output on imx6ul

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SAI MCLK as output on imx6ul

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pietercardoen
Contributor II

Dear

I'm trying to configure the SAI1 MCLK as output (i.MX6UL drives this MCLK signal). However I can't measure anything on this signal. I've configured IOMUXC GPR1 bit 19 (SAI1_MCLK_DIR) to 1 but this isn't helping.

Pad CSI_DATA01 is used for MCLK.

The datasheet describes this about the MCLK selection (register I2Sx_TCR2)

'MCLK Select
Selects the audio Master Clock option used to generate an internally generated bit clock. This field has no
effect when configured for an externally generated bit clock.
NOTE: Depending on the device, some Master Clock options might not be available. See the chipspecific
information for the meaning of each option.
00 Master Clock (MCLK) 1 option selected.
01 Master Clock (MCLK) 1 option selected.
10 Master Clock (MCLK) 2 option selected.
11 Master Clock (MCLK) 3 option selected.'

What are the different options and where are they documented?

Can anyone help me to get this clock out of the device?

Thanks

Pieter

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hitesh_kasera
Contributor III

Hi peter,

I also want to use SAI 1 to interface with microphone for which i need to configure it in device tree. same doubt i am having how do you configure these clock rates? and how should we configure our processor as master mode? if you or anybody else got some idea, it will be really helpful.

Thanks,

Hitesh

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pietercardoen
Contributor II

Dear Igor

This was not really helping. I am trying to configure the imx6ul to drive the MCLK output. However nothing is in the datasheet about what the MSEL does. Now you're saying what option 1 means but where is it documented?

Furthermore, how do you configure imx6ul to drive a clock to the MCLK output?

Best regards

Pieter Cardoen

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igorpadykov
NXP Employee
NXP Employee

Hi Pieter

wm8960 is supported in Demo Images, one can run on i.MX6UL EVK

http://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0_iMX6UL&appType=license&location=null&Parent... 

You can confirm MSEL checking below link (this is closed link, please ask local fae to get access to it)

i.MX 6UL MCLK chip-specific options 

Best regards
igor

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pietercardoen
Contributor II

Dear Igor

It seems that I am unauthorized to read the i.MX 6UL MCLK chip-specific options 

Is it possible to grant me access?

Thanks 

Pieter

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igorpadykov
NXP Employee
NXP Employee

Hi Pieter

sorry I have not authority to grant such permission, please arrange that with local fae.

Additionally one can look at linux driver: linux/sound/soc/fsl/fsl_sai.c
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/sound/soc/fsl/fsl_sai.c?id=rel_imx_...

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi Pieter

i.MX6UL MSEL implemented only MCLK option 1(0b01), MCLK option is dependant by IC design.
Option 1 means SAx_CLK_ROOT. Other options are no connection.

For mclk configuration one can check i.MX6UL EVL codec wm8960 settings in imx6ul-14x14-evk.dts
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/boot/dts/imx6ul-14x14-evk....

Best regards
igor
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