Hello,
I am currently involved in the board bring-up process for our NXP i.MX6SX EVB 3 board.
Since I plan to run Linux on this board for our custom application, I attempted to boot it using the latest U-Boot version for the i.MX6 SoloX processor. However, when using the new U-Boot binary, there was no output on the UART console, suggesting that the boot process was failing very early—possibly during DDR initialization.
To debug this, I compared the working GAPI firmware (provided by NXP) with the new U-Boot image and found differences in the IVT (Image Vector Table) header, particularly in the DCD (Device Configuration Data) section, which is responsible for DDR memory initialization.
As an experiment, I kept the DCD section from the GAPI firmware and replaced only the U-Boot portion with the latest version. With this configuration, the board was able to boot, and I received the following output:
U-Boot 2024.04-lf_v2024.04+ge3219a5a734+p0 (Feb 18 2025 - 04:03:02 +0000)
CPU: i.MX6SX rev1.3 at 792MHz
Model: i.MX6 SoloX Sabre Auto Board
DRAM: 128 MiB
pca953x gpio@30: Error reading output register
pca953x gpio@32: Error reading output register
initcall failed at call 86eb8ff9 (err=-22)
### ERROR ### Please RESET the board ###
In addition, I also tried booting the board using Yocto-generated images, but encountered the same issue—no UART output and no successful boot. So far, the board only boots reliably when using the full GAPI image from NXP, which includes the correct DCD configuration.
We now have access to the board schematics, Could you assist us in identifying or generating the correct DCD settings for this board? Any guidance on customizing the U-Boot DCD table or using NXP tools for DDR configuration based on the schematics would be greatly appreciated.
