Regarding ODT setting of i.MX6UL

[surendrajadhav]

Hello,

I am doing prelayout simulation for i.MX6UL processor with DDR3L.

However in Ref. manual I can see ODT available for all address and control lines.

Also in Hyperlynx for model selection I am not able to understand for processor why address line can be configured as input. The same is shown in attached figure.

I also could not find the list of ODT's available for data lines in reference manual. However I can see them in Hyperlynx model selector. The same shown in attached image.

Let me know if I am using the correct IBIS model for CPU.

Regards,

Surendra

[Yuri]

Hello,

  IBIS files for i.MX6 UL may be found on the Web :

https://www.nxp.com/webapp/Download?colCode=IMX6_UL_9x9_IBIS&appType=license&Parent_nodeId=143101258... 

https://www.nxp.com/webapp/Download?colCode=IMX6_UL_14x14_IBIS&appType=license&Parent_nodeId=1431012... 

Summary page :

i.MX 6UltraLite Applications Processor|NXP 

Description of the models are provided in section 5.3.1.1 ( DDR [Model Selector] ) of the
"Hardware Development Guide for the i.MX 6UltraLite ...".

  Also, please refer to

ODT setting for i.MX6UL 

Have a great day,

Yuri

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