Regarding LCDIF_PWM0 of i.MX8QXP

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Regarding LCDIF_PWM0 of i.MX8QXP

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Kazuma_Sasaki
Senior Contributor I

I am referring the Rev. D, 11/2018 of Document Number: IMX8DQXPRM.

ADMA_LCDIF_PWM0 signal is defined in "Table 9-1. Pin Assignments".

it is belong to the LCDIF module. but, I could not find any description regarding to LCDIF_PWM0 into section 16.10 Enhanced LCD Interface (LCDIF).

Could you please teach me how to use the ADMA_LCDIF_PWM0 signal?

Best Regards,

Kazuma Sasaki.

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igorpadykov
NXP Employee
NXP Employee

Hi Kazuma

this signal is not part of LCDIF module, but part of Audio Subsystem

(belongs to the same subsystem as LCDIF) depicted on

 Figure 16-1. Audio Subsystem High-Level Block Diagram i.MX8DQXP Reference Manual.

Its address is given in Table 2-6. Audio DMA Memory Map, usage in

sect.16.19 Pulse Width Modulation (PWM) i.MX8DQXP Reference Manual.

Note, there are also another LSIO PWMs described in Figure 18-1. LSIO Subsystem.

https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf 

Best regards
igor
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igorpadykov
NXP Employee
NXP Employee

Hi Kazuma

this signal is not part of LCDIF module, but part of Audio Subsystem

(belongs to the same subsystem as LCDIF) depicted on

 Figure 16-1. Audio Subsystem High-Level Block Diagram i.MX8DQXP Reference Manual.

Its address is given in Table 2-6. Audio DMA Memory Map, usage in

sect.16.19 Pulse Width Modulation (PWM) i.MX8DQXP Reference Manual.

Note, there are also another LSIO PWMs described in Figure 18-1. LSIO Subsystem.

https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf 

Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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Kazuma_Sasaki
Senior Contributor I

Dear Igor,

Problem solved.

I found description at your point. Thank you so much.

Best Regards,

Kazuma Sasaki.

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