Recommendation of DRAM_SDCKE1 when unused

[ko-hey]

Hi all

I have a question about diffierenial clock termination design rules.

According to the DDR section of schematics tab in following Check List, it has following description.

DRAM_SDCKE0 and DRAM_SDCKE1 may be connected to individual 10 kohm 5% resistors to GND. Please click "Ref7" for more info.

I have a question about the description.

If user don't use DRAM_SDCKE1, user can leave the pin as "OPEN".

Is it correct ?

If no, please let me freescale's recommandation.

Ko-hey

[igorpadykov]

Hi Ko-hey

right, it can be left as "OPEN",

for example as in Sabre schematic spf-27392 p.4

signal DRAM_SDCKE1

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------