UART condition at mem mode on I.MX28

[igorpadykov]

Hi Sung-Uk

from sect. 9.2 Operation MCIMX28RM

Each individual digital pin supporting the GPIO operation may be dynamically programmed

at any time to be in one of the following states:

• High-impedance (for input, three-state, or open-drain applications)

sect.9.4.53 PINCTRL Bank 0 Data Output Enable Register

For pins in bank 0 that are configured as GPIOs, a 1 in this register will enable the

corresponding bit value from HW_PINCTRL_DOUTxx register to be driven out the pin,

and a 0 in this register will disable the corresponding driver.

Best regards

igor

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[sung-ukjang]

Dear Igor,

This is my original question for this issue. You gave me the tips to fix the problem for this question as you see above..

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Dear Freescale supporters,

Since my customer is developing phone module with i.MX28, they face high leakage power consumption thru. UART pins at mem mode. Actually those UART pins are connected to other peripherals. When the mem mode starts, those UART pins go to level low while other peripherals are still active mode in some cases. That's there are current flowing from peripheral devices thru. UART pins and the total leakage current is about max. 100mA now.

Is there any way to change the UART ports (UART0_RX, UART1_RX, UART1_CTS, UART3_RX and UART3_CTS) to tri-state mode not to flow the current in mem mode

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The customer is confusing how to set the those UART ports ( UART0_RX, UART1_RX, UART1_CTS, UART3_RX and UART3_CTS) to high impednace state when it goes to mem mode. Based on your recommendation, the customer can set HW_PINCTRL_DOE0 to output HW_PINCTRL_DOUT0 register with the recommendation of 9.2.3.1 Output Operation like following :

9.2.3.1 Output Operation

Programming and controlling a digital pin as a GPIO output is accomplished by

programming the appropriate bits in four registers, as shown in the figure below.

• After setting the field in the HW_PINCTRL_MUXSELx to program for GPIO

control, the HW_PINCTRL_DRIVEx register bit is set for the desired drive strength

and pin voltage. Set bits in HW_PINCTRL_PULLx as required to enable pullups.

• The HW_PINCTRL_DOUTx register bit is then loaded with the level that will

initially be driven on the pin.

• Finally, the HW_PINCTRL_DOEx register bit is set.

• Once set, the logic value the HW_PINCTRL_DOUTx bit will be driven on the pin

and the value can be toggled with repeated writes.

1) However we don't know memory map of UART ports for those UART0_RX, UART1_RX, UART1_CTS, UART3_RX and UART3_CTS pins to set to high impedance state.  Pls advise which bank of the GPI is for this UART port.  Is it Bank 0 as you said ? In that case, what's the bit assignement for those UARTx_RX, UARTx_TX and UARTx_CTS. Pls advise.

2) I need to know how to select high impedance state, not low ot high state for those port. Pls advise.

Regards,

SU Jang

[igorpadykov]

Hi Sung-Uk

1. map one can find in MCIMX28RM HW_PINCTRL memory map p.688

2. to select high impedance state HW_PINCTRL_DOEx register bit should be cleared.

~igor

[sung-ukjang]

Dear Igor,

Would you pls clarify one more thing ?  Based on page 707 -708, I can see the Pin multi[pexing of the product. Bank 2 and Bank 3 have AUART port  assignement there. Is it right if I just clear HW_PINCTRL_DOE2 (8001_8B21) and HW_PINCTRL_DOE3 (8001_8B30 and 8001_8B31) to make them high impedance ? Pls advise.

[igorpadykov]

Hi Sung-Uk

yes this understanding is correct.

~igor

[sung-ukjang]

Dear Mr. Igor,

I realized this customer is still struggling with this problem until now.  However I can't find the memory map 9adress) of those HW_PINCTRL_MUXSELx register, HW_PINCTRL_DRIVEx register, HW_PINCTRL_DOUTx register and HW_PINCTRL_DOEx register from the data sheet. Would you pls inform me the memroy adress of those registers ? Pls advise.

[igorpadykov]

Hi Sung-Uk

please check

MCIMX28RM Chapter 9 Pin Control and GPIO (PinCtrl)

~igor