RTC in the iMX537 problem by battery backup

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RTC in the iMX537 problem by battery backup

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jomeke
Contributor II

Hi all,

we developed a custom board with the iMX537 and the PMIC MC34708 chip.

On the PMIC, there is a coin cell connected (3V CR2032) on the LICELL pin.

If we program the RTC on the CPU, the RTC runs perfect until we cut the power, afterwards, all the RTC registers are reset.

We have tried the same on a (changed) QSBoard and have the same behavior.

While the power is cut, the voltage VSRTS drops from 1.3V to 1.23V and the 32Khz clock keeps running.

Is there anbody who has already successfull used the iMX537 RTC function, so yes can you give me any sugestion where to look for ?

Best regards

Johan

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MarkRoy
Contributor III

Hello there,

I am working with a custom designed imx536 board that makes use of the MC34708.    Currently I am trying to tackle the same problems as Johan described.   When I boot into Linux, the driver works fine, I can set/read the RTC with the mxc_rtc driver with no problems.    Running the RTC unit test also passes.  

However, when I shut down the board and kill the power,  looking at the VSRTC line it drops from 1.3V to 1.2V.  However, according to the MC34708 datasheet, this is normal behaviour.   See page 27 of the MC34708 datasheet which states, "... VSRTC will be set to 1.3 V in on mode (on, on standby and on standby low power modes).  In off and coin cell modes the VSRTC voltage will drop to 1.2 V." 

Looking at the CLK32KMCU line from the MC34708 I see a very nice looking 32.768Khz clock pulse that persists after power has been removed when the 3V cell is present.

My power up sequence should be fine, as it is determined by the MC34708 PUMS bits which I have configured for  DDR3 mode. For the power down sequence, I am simply issuing the "halt" command in Linux, and then turning off the main power once the init has completed running and the kernel reports that it is halted.  However,  I dont think it makes sense that the power down sequence should affect the RTC LP.    It seems to me that the main reason for an RTC backup is that in the event of an unexpected power failure you can maintain time.  If the power cut event is unexpected, then you cant turn off the regulators in any particular order.

I'm currently digging through the driver trying to identify any problems.  I'll post here if I have found anything. 

Currently using  the 11.09 Linux BSP  (2.6.35.3-1129 kernel) 

Regards,
Mark Roy

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Johan,

 

As promised, these are the recommended workarounds for the SRTC issue:

 

Workarounds:

Modify the power up/down sequence:

   - The power up sequence should be: VCC= > VDDA => VDD_REG

   - The power down sequence should be: VCC => VDD_REG => VDDA or VCC =>VDDA =>VDD_REG

Systems that do not need secured RTC can use the RTC of the PMIC.

 

Best regards.

Jorge.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Johan,

 

In addition to Rodrigue's comments:

 

- Seems like the MX53 needs a specific power down sequence to maintain the SRTC, not only power up. I'm looking for info about that and will send to you as soon as I find it.

- The 1.23V you mention are below the spec, the lowest allowed is 1.25V. I'm wondering if it could be due to the capabilities of the battery. Could you please try replacing the LICELL with a 3.0V voltage source?

- Do you see the same behavior in the QSB? I mean, 1.23V when the power is off?

- If any of these points turns out to be the issue, the workaround would be to use the RTC of the MC34708 instead of the one in the MX53. This RTC is powered directly from the LICELL instead of the VSRTC, so its contents are kept no matter the power down sequence and the value of the VSRTC when the system is off.

 

Best regards.

Jorge.

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Rodrigue
NXP Employee
NXP Employee

Hi Johan,

Check your power sequence and make sure VSRTC stays stable at 1.3V

If you violates something here, it can typically generate such issues.

When (in your power up Sequnce) do you enable the SoC ANA (VDDA,VDDAL, VP)?

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