Hi,
i'm in a mcu choosing phase on my project so i need to understand is nxp is good or not, i'm developing an application using imx RT1180 with EVK board and MCUXpresso 24.x as SDK.
I need to use external SDRAM and not DTC because my evaluation code is too large, i've find a lot of other posts that indicate a RT1050 script for debugger, one for 1170 but nothing for 1180. All examples uses internal DTC and only one has initialization for external SDRAM used to store data ma nothing to execute it. So i presume i need xip file and script for debugger and someting else. I'd like to use some of official instead something done by me to correctly evaluated the platform.
And again i'd like to know if also exist a way to directly program external flash to store my program via jtag instead using a provisioning tool all times and not work on ram al loose everything on reboot.
I hope on your help to have a officilal script and xip file and also a small guide to configure it. thanks.
My evk version if needed is:
SCH-50577 REV C3
700-50577 REV C1
This is the link i've found:
解決済! 解決策の投稿を見る。
Hi,
ok the problem on SDRAM is the rework needed to use it on EVK board. i can't do that so i'm testing HyperRam and the result is to have the code that in first step run but after a few cycle crash. i'm closing this threat and open one new.
thanks
Hi,
ok the problem on SDRAM is the rework needed to use it on EVK board. i can't do that so i'm testing HyperRam and the result is to have the code that in first step run but after a few cycle crash. i'm closing this threat and open one new.
thanks
Hello!
NXP is a reliable choice for MCUs. To use external SDRAM with the i.MX RT1180, configure your project in MCUXpresso to use SDRAM instead of DTC. Use the MCUBootUtility tool to program the external flash via JTAG. Ensure all steps, including setting the device configuration data, are correctly followed.
I hope this helps!
Thanke to replied fast,
first step using SDRAM:
i'm configuing my project like this
project-> proprierties->MCU Settings moved from ram6 a ram la SDRAM
project-> proprierties->Settings-> Managed Link Script->.bbs in SDRAM e add flag on Link application
and then in debug config-> linkserver debug-> advanced setting checked if is present --cachelib libm7_cache.so
complied ok, SDRAM is populated but when starts writing this is the result:
LinkServer RedlinkMulti Driver v24.12 (Dec 18 2024 18:34:07 - crt_emu_cm_redlink build 869)
Found chip XML file in C:/Project/ADV500/ADV500_cm7/Debug\MIMXRT1189xxxxx.xml
Reconnected to existing LinkServer process.
============= SCRIPT: RT1180_connect_M33_wake_M7_ITC.scp =============
RT1180 Connect M33 and Wake M7 to ITC Script
DpID = 5BA02477
APID = 0x74770001
************ runBootLoader to enter serial downloader mode *************
PC = 1001BC6A, SP = 30489F40
DpID = 5BA02477
APID = 0x74770001
R15 = 0x100157F4
********** Initialize CM33 ************
Filling 0xE000E180 + 0x00000040 with 0xFFFFFFFF
Filling 0xE000E280 + 0x00000040 with 0xFFFFFFFF
Filling 0x201E0000 + 0x00020000 with 0x00000000
Filling 0x20200008 + 0x0001FFF8 with 0x00000000
************* Enable CM7 **************
************ Prepare Clock *************
******** Creating Landing Zone *********
Filling 0x303C0000 + 0x00020000 with 0x00000000
Filling 0x303E0000 + 0x00020000 with 0x00000000
Filling 0x30400000 + 0x00020000 with 0x00000000
Filling 0x30420000 + 0x00020000 with 0x00000000
************* Kickoff CM7 **************
Resp1 : 0xE1D20206
Resp2 : 0x000000D6
TAP 0: 5BA02477 AP 0: APID: 74770001 ROM Table: 00000002
TAP 0: 5BA02477 AP 1: APID: 44770002 ROM Table: 80000003
TAP 0: 5BA02477 Core 2: M7 APID: 74770001 ROM Table: E00FD003*
TAP 0: 5BA02477 Core 3: M33 APID: 74770001 ROM Table: E00FF003
APID = 0x74770001
============= END SCRIPT =============================================
Probe Firmware: MCU-LINK on-board (r1E2) CMSIS-DAP V3.146 (NXP Semiconductors)
Serial Number: OK1PG5OV03J1X
VID:PID: 1FC9:0143
USB Path: 0001:001c:00
Using memory from core 2 after searching for a good core
( 30) Emulator Connected
debug interface type = CoreSight DP (DAP DP ID 5BA02477) over SWD TAP 0
processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 2
number of h/w breakpoints = 8
number of flash patches = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 5BA02477. CpuID: 00000C27. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)
ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)
ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)
ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)
ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)
ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)
ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)
ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core
ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT
ROM 1 E0043000: CID B105900D PID 04001BB908 CSt CSTF type 0x12 Trace Link - Trace funnel/router
CM7 Rev. 7.0 DTCM: 512KB ITCM: 512KB
LoUU: Level 2: LoC: Level 2
Level 1 Cache Type: Instruction+Data
ICache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 512 Assoc: 2 LineSize: 8
DCache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 256 Assoc: 4 LineSize: 8
NXP: MIMXRT1189xxxxx
Connected: was_reset=false. was_stopped=true
Awaiting telnet connection to port 3330 ...
GDB nonstop mode enabled
FreeRTOS stack backtrace is disabled in Non-stop mode (use All-stop)
After error Nn(05). Wire ACK Wait in DAP access -
Failed to read address register in DAP - Nn(05). Wire ACK Wait in DAP access
Target error from Write Memory: Em(17). Debug port inaccessible after access at location 0x80000000
GDB stub (C:\nxp\LinkServer_24.12.21\binaries\crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.
error closing down debug session - Nn(05). Wire ACK Fault in DAP access
i've attached my project.
thanks
Simone