RT1176 DMA major IRQ too often

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

RT1176 DMA major IRQ too often

739件の閲覧回数
NXPur
Contributor I

I want to read from LPSPI1 a 4 byte value from RDR twice => 8 bytes in a ring buffer  via DMA with major end irq like this:  (LPSPI fifo watermarks are zero)

DMA0->TCD[0].SADDR = (uint32_t) &LPSPI1->RDR;
DMA0->TCD[0].DADDR = (uint32_t) slaveRxData;
DMA0->TCD[0].ATTR = 0x0202; // SSIZE=2 DSIZE=2
DMA0->TCD[0].SOFF = 0;
DMA0->TCD[0].DOFF = 4;
DMA0->TCD[0].NBYTES_MLNO = 4;
DMA0->TCD[0].SLAST = 0;
DMA0->TCD[0].CITER_ELINKNO = 2;
DMA0->TCD[0].BITER_ELINKNO = 2;
DMA0->TCD[0].DLAST_SGA = (uint32_t) ptrRXTCD;
DMA0->TCD[0].CSR = 0x0013; // ESG DREQ INTREQ !!! irq function !!!

but the DMA irq comes after 4 bytes transferred. I want every 8 bytes the irq.

タグ(1)
0 件の賞賛
返信
1 返信

728件の閲覧回数
EdwinHz
NXP TechSupport
NXP TechSupport

Hi @NXPur,

I believe you should take a look into the EDMA_PrepareTransfer() function from the edma. This function includes the parameter “transferBytes” and “bytesEachRequest”, which dictate the amount of bytes that will be transfer every minor and major loop of the DMA request, before executing the IRQ. Please let me know if this helps.

 

BR,

Edwin.

0 件の賞賛
返信