RT1062 POR Pulls GPIO_EMC_03 Low

[tpetrovic]

I'm working on a design where GPIO_EMC_00 through GPIO_EMC_07 on the RT1062 are shared with a second MCU. When the second MCU tries to control the data lines, it puts the RT1062 in reset by setting POR to low. When the POR is low, all RT1062 GPIO pins seem to function fine except GPIO_EMC_03. For some reason when the RT1062 goes into POR, GPIO_EMC_03 pulls it's line low, so the second MCU is unable to control that data line. 

Is this behavior normal? It only occurs on GPIO_EMC_03. Is there a way to configure the RT1062 so this doesn't happen?

Thanks!

[Yuri]

@tpetrovic 
Hello,

   according to i.MXRT 1060 Datasheet, table "functional contact assignments",
column "Default setting on Reset", during reset GPIO_EMC_03 is output ("this pin
output is in a high level until the system reset is complete).

https://www.nxp.com/docs/en/nxp/data-sheets/IMXRT1060CEC.pdf

Regards,
Yuri.

[gdelirium454]

Hi Yuri. Thank you for the quick response and pointing out this missed detail. 

I will try to stretch my luck here and maybe get your further opinion about overcoming a design challenge in our design. Currently our system has two unique uC that interface to a Flash device via shared 8-bit bus. MIMXRT1062 is one of the uC. While is RESET state, MIMXRT1062 is not allowing the secondary uC to write to Flash due to the condition of the GPIO_EMC_03 pin that you have pointed out. Do you have any recommendations as to how we might overcome this challenge? Would placing a 8-channel 1:2 mux/demux in series between Flash and the two uC resolve this issue? RESET pin condition could control to which uC the 8-bit bus goes to. 

Thoughts? 

[Yuri]

@gdelirium454 
Hello,
 
    I think a tri-state buffer for MIMXRT1062 or mux circuit is proper solution
for Your design.

Regards,
Yuri.