RT1021: Tristate GPIO on POR

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RT1021: Tristate GPIO on POR

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ngraves
Contributor I

Hello,

I am wondering if there is a way to configure a GPIO to be in high impedance mode while the RT1021 is held in reset (via the external reset line). I am using GPIO_AD_B0_04 connected to the reset line (active low) of a peripheral device. This connection has a 10k external pull up.

When the RT1021 goes into reset, I see via oscope that this line goes low while the RT1021 is in reset, triggering an undesirable reset of my peripheral device. I have tried every combination of IOMUX configurations, and even applied them directly in the DCD.

is there anyway to configure a GPIO as high-impedance while the RT1021 is held in reset?

 

Thanks,

Nick

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi ngraves,

 

Thank you for your interest in the NXP MIMXRT product, I would like to provide service for you.
As I know, we can't configure the GPIO in the reset mode.
Do you check the NVCC_GPIO_3V3 during the reset? Whether that have the voltage or not? or goes low or not?
1. You need to make sure GPIO_AD_B0_04 is just connect to your pullup no other signal
2. Please also check your 10K pullup voltage, whether that goes low or not?
As from the datasheet, GPIO_AD_B0_04 in default is the input pin, so it should determined by the external circuit.

image.png
Do you try even disconnect your peripheral devices, just leave the 10K external pull up, whether that can pull up during reset or not?

 

Any updated information, please kindly let me know.

Kerry

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