Question, i.MX8M Quad Lite power up sequence.

[SLICE]

Dear team,

I would like to ask about the power-up sequence of i.MX8M QL.

Please give your answers to the following questions.

1. Are there any time specific regulations on power-on or power-down sequence?

2. Is it possible for NVCC_XXX or NVCC_DRAM to rise up during VDDA_1P8_XXX or VDDA_DRAM are rising-up? Or should those (NVCC_XXX or NVCC_DRAM) rise-up after the completion of VDDA_1P8_XXX or VDDA_DRAM rising-up?

3. In your datasheet, it is said that the power supply of PHY should be ON after chip power up.

Please let me know the exact meaning of “power-up”.

Thanks,

Miyamoto

[SLICE]

Hi igorpadykov‌

Thanks for your RE!

Finally, the PHY power can be turned on in any timing though the stabilization of PHY power is important. Right?

Regards,

Miyamoto

[igorpadykov]

Hi Miyamoto

right

Best regards
igor

[igorpadykov]

Hi Miyamoto

>1. Are there any time specific regulations on power-on or power-down sequence?

no

>2. Is it possible for NVCC_XXX or NVCC_DRAM to rise up during VDDA_1P8_XXX or VDDA_DRAM are rising-up?

no

>Or should those (NVCC_XXX or NVCC_DRAM) rise-up after the completion of VDDA_1P8_XXX or VDDA_DRAM >rising-up?

according to sect.3.2.1 Power-up sequence i.MX8M Datasheet steps should be

• Turn on VDDA_1P8_XXX, VDDA_DRAM (no sequence between these rails)

then
• Turn on NVCC_XXX and NVCC_DRAM (no sequence between these rails)

>3.exact meaning of “power-up”.

it is power-up sequence defined in sect.3.2.1 Power-up sequence i.MX8M Datasheet

https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQCEC.pdf 

Best regards
igor
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[SLICE]

Hello Igor,

Thanks for your support!

>3.exact meaning of “power-up”.

The datasheet says as below.

“After chip power up, the power of these PHys should be turned on.”

Please specify the chip power up.

The customer wants to be sure the exact definition of the 'chip power up'.

Can I understand that the chip power up is as below?

Completion of power up sequences(after POR_B release).

Regards,

Miyamoto

[igorpadykov]

Hi Miyamoto

>Can I understand that the chip power up is as below?

>Completion of power up sequences(after POR_B release).

correct.

Best regards
igor

[SLICE]

Hi igorpadykov‌

As for the PHY power supply, the following statement is written in your datasheet.

"If any of the PHY power are turned on during the power up sequence, the POR_B can be released after the PHY power is stable.”(IMX8MDQLQCEC 3.2.1 Power-up sequence)

From those, can I understand as below?

The PHY power should be turned on after the chip’s power-up, because if PHY power are turned on during the power-up sequence, one has to wait the PHY power’s stabilization before POR_B release.

Regards,

Miyamoto

[igorpadykov]

Hi Miyamoto

PHY power can be turned on during the power up sequence (as part of power-up sequence),

or also they could be turned on after chip’s power-up sequence.

Best regards
igor