Question, i.MX8M LinuxBSP

[SLICE]

Dear team,

I would like to ask about LinuxBSP for i.MX8M.

1.

Could you show me whether the error handling for eMMC Read disturb error or retention error is implemented in LinuxBSP?

2.

Could you show me whether Linux BSP supports SPI Busrt transfer which is described at Figure 10-8 in your Reference Manual?

Regards,

Miyamoto

[SLICE]

Hello jamesbone‌

Thanks a lot for your reply.

Can I understand one should modify the Linux driver to manage the read-disturb and read-retention error of eMMC?

Regards,

Miyamoto

[jamesbone]

Yes, thats correct

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[SLICE]

Hello jamesbone‌

Can I have your response also for SPI burst transfer?

Regards,

Miyamoto

[SLICE]

Hello jamesbone‌

I am still waiting for your RE!

Best Regards,

Miyamoto

[Bio_TICFSL]

Hi @Masamishi,

The SPI BURTS works on master mode as well. BURST LENGTH specifies the number of bits (not words) in the burst.

So if BURST LENGTH is set to 8, you will get one byte (8 bits). If BURST LENGTH is set to 32, you will get four bytes (32 bits).

Regards

[SLICE]

Hello Bio_TICFSL‌

Sorry for may late response.

But the customer is saying about 'SINGLE BURST TRANSFER', not 'BURST TRANSFER'.

Could you please give your reply?

Best Regards,

Miyamoto

[Bio_TICFSL]

Hi SLICE‌

I'm still not clear on the problem the customer is having.

In Master mode, the SSI will send out a burst equal to the number of bits in burst length.

The only thing controlled by SS_CTL is:

When SS_CTL is 0, SS will stay lower for the entire time. If there are words in the FIFO, they will come out continuously. If the FIFO becomes empty, then the transmission will stop until a new word is written by software but the SS will remain low during the idle period.

When SS_CTL is 1, SS will go high (de-asserted) during any idle period between words.

Regardless of the value of SS_CTL, the SSI will always send a burst with the number of bits defined in BURST_LENGTH.

Let me know if that clears things up any.

Regards

[SLICE]

Hi Bio_TICFSL‌

The following is the software-code for your BSP, the revision is imx_4.14.78_1.0.0_ga.

The customer thinks that the driver supports only in Slave-mode.

Especially, the red lines in below indicates that the code can run as only Slave-mode.

Is it true?

<drivers/spi/spi-imx.c>

https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/spi/spi-imx.c?h=rel_imx_4.14.78_1....

static int mx51_ecspi_config(struct spi_device *spi)

{

  ....

               /*

              * eCSPI burst completion by Chip Select signal in Slave mode

              * is not functional for imx53 Soc, config SPI burst completed when

              * BURST_LENGTH + 1 bits are received

              */

              if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx))

                            cfg &= ~MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select);

              else

                            cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select);

  .... 

}

[Bio_TICFSL]

Hi SLICE‌

For the MX51 yes.

[SLICE]

Hi Bio_TICFSL‌

I could not understand what you said, "For the MX51 yes".

The customer wants to use the driver-code and their application is to use it for master-mode.

If the code does not support master-mode, they have to give up using your BSP.

Best Regards,

Miyamoto

[SLICE]

Hello Bio_TICFSL‌

I am still waiting for your RE!

BR,

Miyamoto

[jamesbone]

Hello Miyamoto San,

Let try to answer your questions:

Can I understand that the handlings of eMMC Read disturb error and the retention error are implemented in the Linux driver?

ANSWER. Nop they are not implemented in the Linux Driver

And can I understand that the SPI driver implements the SPI single burst transfer?

ANSWER. Yes the Single Burst Transfer it is already implemented in the SPIDEV driver from the Linux BSP

Have a great day,
Jaime

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[SLICE]

Hello jamesbone‌

As for the SPI burst transfer,

Does it support also the burst transfer in master-mode?

The customer looked the source-code and they believe the code supports only in slave-mode.

Best Regards,

Miyamoto

[Bio_TICFSL]

Hi Masamichi,

The eMMC retention error is showing by the Unit test:

  autorun-mmc-blockrw.sh
• autorun-mmc-fdisk.sh
• autorun-mmc-fs.sh
• autorun-mmc-mkfs.sh
• autorun-mmc.sh

at /unit_tests/MMC_SD_SDIO/

The SPI dirver is at: drivers/spi/spi_imx.c   that is a SPI master controller device

Regards

[SLICE]

Hello Bio_TICFSL‌

Thanks a lot for your prompt reply!

Can I understand that the handlings of eMMC Read disturb error and the retention error are implemented in the Linux driver?

I think the handlings should be implemented to its firmware which the memory-provider offer, in general. I mean eMMC controller HW.

My customer thinks that those might be needed to implement by software by himself.

And can I understand that the SPI driver implements the SPI single burst transfer?

Best Regards,

Miyamoto

[SLICE]

Hello Bio_TICFSL‌

I am still waiting for your RE.

Best Regards,

Miyamoto

[SLICE]

Hello Bio_TICFSL‌

I am still waiting.

Regards,

Miyamoto

[SLICE]

Hello Bio_TICFSL‌

I am still waiting.

Best Regards,

Miyamoto