Question, i.MX6SL Errata ERR005778

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Question, i.MX6SL Errata ERR005778

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Aemj
Contributor IV

Dear team,

I would like to ask about Errata ERR005778 of i.MX6SoloLite.

My customer is trying to implement the workaround into their software(they use RTOS for their system). And in advance of that, they have following questions about the workaround. Please give your answers to the following questions.

As for workaround-1;

The errata document says that “Prior to reducing the DDR frequency (400 MHz), read the measure unit count bits (MU_UNIT_DEL_NUM).”

(1)

Can I understand that “Prior to reducing” means ANYTIME before reducing the DDR frequency?

(2)

Should the program which read out the MU_UNIT_DEL_NUM run on OCRAM?

Is it possible to run it on DDR?

As for workaround-2;

(“Bypass the automatic measure unit when below 100 MHz, by setting the measure unit bypass enable bit (MU_BYP_EN).”)

(3)

Could you show me when to execute this procedure?

ANYTIME after reducing clock?

(4)

Should this procedure run on OCRAM? Is it possible to run it on DDR?

(5)

Can I understand that one should not execute SDRAM code during MU_BYP_EN=1.

(6)

Is it needed to set MU_BYP_EN into 1 before setting MU_BYP_VAL, and to clear MU_BYP_EN after setting MU_BYP_VAL?

The customer thinks the above is needed.

 

As for workaround-3;

Double the measure unit count value read in step 1 and program it in the measure unit bypass bit (MU_BYP_VAL) of the MMDC PHY Measure Unit Register, for the reduced frequency operation below 100 MHz.

 (7)

Could you show me the reason why the measure unit bypass bit(MU_BYP_VAL) must be the double of the measure unit count value?

(8)

Should this procedure run on OCRAM? Is it possible to run it on DDR?

(9)

After those procedure is completed, is any wait time required?

Is it possible to go to next other operations with no wait?

As for the below statement;

Software should re-enable the measure unit when operating at the higher frequencies, by clearing the measure unit bypass enable bit (MU_BYP_EN).”

(10)             

Can I understand that one should clear MU_BYP_EN bit(MU_BYP_EN=0) before returning the clock frequency?

 

As for the below statement;

This code should be executed out of Internal RAM or a non-DDR based external memory.

(11)

Can I understand that the code for all of the workaround procedures(1,2 and 3) should be executed on internal RAM or non-DDR based memory?

Sorry for a lot of questions, but those are needed to write actual code for them.

Thanks,

Miyamoto

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Miyamoto

1. yes
2. value MU_UNIT_DEL_NUM can be read from DDR too
3. yes, note DDR should be placed to self refresh before this procedure
4. should be run in OCRAM, DDR should be placed to self refresh before this procedure
5. yes, prior starting this workaround place DDR to self refresh mode
6. order may be any as it does not affect DDR (it is in self refresh), example can be found in lpddr2_freq_imx6.S
(macro mmdc_clk_lower_100MHz )
http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/mach-imx/lpddr2_freq_imx6.S?id...
7. workaround value is provided based on simulation tests
8. should be in OCRAM
9. necessary to perform FRC_MSR, so delay time value from delay logic is latched inside the DDR PHY.
check sect.8 Delay Unit Hardware Overview AN4467
10. yes
11. yes

Best regards
igor
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Aemj
Contributor IV

Hello Igor,

Thanks a lot for your answers/

Regarding to 7, let me ask some more.

The customer’s environment is as below.

- Typical DDR frequency is 400MHz.

- They are using LPDDR2, and reduced DDR frequency is 24MHz.

(7-1)

Is it right that the value of MU_BYP_VAL should come to double in the above customer’s case also?

(7-2)

Can I understand that your simulation can cover the above use-case?

Thanks,

Miyamoto

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Miyamoto

>(7-1)

yes right

>(7-2)

yes it also covers this case

Best regards
igor

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Aemj
Contributor IV

Hello Igor,

Thanks for your support.

Actually, the customer is working on the issue that i.MX6SL could come to freeze.

And they believe that the issue occurs at the frequency change.

After implementing the workaround, the occurrence rate did not get better.

And they still have a question about the suitability of the MU_BYP_VAL value(double of the measure unit count value).

The customer thinks more suitable value (than double) may exist.

Could you show me whether the value of double can change according to the temperature condition?

Thanks,

Miyamoto

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igorpadykov
NXP TechSupport
NXP TechSupport

Hello Miyamoto

data provided in Errata document was tested and works for all

temperature confitions.

Best regards
igor

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