My customer has two questions on Freescale LinuxBSP.
(1) I2C Clock setting (set in /linux/drivers/i2c/busses/i2c-imx.c)
The customer got the following information from his developing partner.
In the latest LinuxBSP, the variable value of i2c_clk_rate(used in i2c-imx.c) is revised and it is 22MHz.
In previous version of LinuxBSP, I2C SCL clock rate cannot be set to 400KHz because i2c_clk_rate value is 6MHz.
Is it true?
In Freescale LinuxBSP, ODT field of IOMUXC_SW_PAD_CTL_GRP_RGMII_TERM is configured as default value(000 : Disabled).
Could you tell me whether the ODT setting in LinuxBSP is reasonable?
Solved! Go to Solution.
For I2C clock setting, yes, previous setting of ipg_per clock is 6MHz, as it is i2c's parent, so the i2c can NOT divide it to close to 400KHz, so there is a patch to increase ipg_per clock to 22MHz to support 400KHz speed of I2C.
For the ODT setting, according to ENET owner's saying, our board did NOT need to enable this ODT as the PHY is near the SOC.
Hope this info helpful.
Dear Yongcai Huang,
I searched all BSP of iMX6 JB4.2, I can't found where can modify IOMUXC_SW_PAD_CTL_GRP_RGMII_TERM register.
Could you help to check this.
Thank you so much.
The patch is already there very long ago, you can just check our latest BSP release. There should a an external git for getting our BSP release package.