Dear team,
I would like to ask about GPMI of i.MX28.
My customer wants to use GPMI port of i.MX28 for connecting Async RAM or Nor Flash.
They want that even if the external circuitry should be needed.
(1) Can the GPMI port be configured as not output NAND command?
If not, they think it needs the external circuitry for gating the NAND command output by using CLE signal.
(2) Can i.MX28 control fully the address output from GPMI port?
To handle address output to external RAM/NOR, the external circuitry may need to latch Row Adr3. Then 8bit address space can be controlled by i.MX28.
Can i.MX28 software specify the Row Adr3 fully?
(3) Reading data from Async RAM/Nor Flash
The data transfer of NAND can be seen as a kind of burst transfer. To accessing AsyncRAM/Nor, only the first data(or 2nd data) is needed.
Do you have any ideas how to handle the read/write data by CPU?
(4) Do you have any examples on the ideas to connect AsyncRAM/Nor to GPMI ports?
Thanks,
Miyamoto
