Hi team,
I would like to ask about KPP port of i.MX25.
My customer plans to use KPP_ROW6(V5 pin) port of i.MX257 as a GPIO output.
The customer believes that the KPP_ROW6 pin can be used to output High or Low at any desired timing.
Is it true?
Please let me know if you have any concern on that.
Thanks,
Miyamoto
Solved! Go to Solution.
Hello,
KPP_ROW6 (V5) pin has no GPIO functionality as Fabio mentioned.
Nevertheless, You are right, the KPP in itself allows to control pin state.
KPCR[KRE6] = 0 (Row is not included in the keypad key press detect)
KDDR[KRDD6] = 1 (ROW pin configured as an output)
KPDR[KRD6] = 1/0 (data)
Have a great day,
Yuri
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There is no GPIO functionality associated with this particular pin.
Regards,
Fabio Estevam
Hi Fabio,
Thanks for your reply but I need more detailed explanation on that.
I think the port, KPP_ROW6, can be configured as an output port by configuring Keypad Data Direction Register (KDDR).
And I think one can control the output level of KPP_ROW6 by writing 1 or 0 bit into KPDR[6].
Am I wrong?
Thanks,
Miyamoto
Hello,
KPP_ROW6 (V5) pin has no GPIO functionality as Fabio mentioned.
Nevertheless, You are right, the KPP in itself allows to control pin state.
KPCR[KRE6] = 0 (Row is not included in the keypad key press detect)
KDDR[KRDD6] = 1 (ROW pin configured as an output)
KPDR[KRD6] = 1/0 (data)
Have a great day,
Yuri
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hi team,
The reference manual of i.MX25 says as below.
"The kKeypad port (KPP) is a 16-bit peripheral that can be used as a keypad matrix interface or as general
purpose input/output (I/O)."
Could you give your detailed reason why you say that KPP_ROW6 (V5) pin has no GPIO functionality?
Thanks,
Miyamoto
Hello,
> why you say that KPP_ROW6 (V5) pin has no GPIO functionality?
Most of KPP signals can be configured as GPIO via IOMUXC_SW_MUX_CTL_PAD_KPP-...
registers, but the KPP_ROW6 does not have corresponding register.
Only the following ones are available :
IOMUXC_SW_MUX_CTL_PAD_KPP_ROW0
IOMUXC_SW_MUX_CTL_PAD_KPP_ROW1
IOMUXC_SW_MUX_CTL_PAD_KPP_ROW2
IOMUXC_SW_MUX_CTL_PAD_KPP_ROW3
IOMUXC_SW_MUX_CTL_PAD_KPP_COL0
IOMUXC_SW_MUX_CTL_PAD_KPP_COL1
IOMUXC_SW_MUX_CTL_PAD_KPP_COL2
IOMUXC_SW_MUX_CTL_PAD_KPP_COL3
Regards,
Yuri.
Now I see the response from Yuri and understood that it is possible to program the KPP interface to use the pin as an output.
Sorry for the confusion.
Regards,
Fabio Estevam