Question about i.MX6Q/QP errara ERR004536.

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Question about i.MX6Q/QP errara ERR004536.

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takayuki_ishii
Contributor IV

Hello community,

I have some questions about i.mx6DQ and i.MX6DQP errata IMX6DQCE.

From rev 6 to rev 6.1 it have modified about ERR004536.

  I have no file of IMX6DQCE rev6.

  Only rev6.1 and rev7 I have.

In table 2. it say that 

 1) "removing i.MX6Dual/Quad Only.", that's meen it have both i.MX6Dual/Quad and i.MX6DualPlus/QuadPlus

    have this errata. is it correct?

pastedImage_1.png

2) It say that "from: Silicon revision 1.3 to; No fix scheduled".

  In Linux BSP, to fix this issue, it has modified to set bit7 of 0x6C register as following.

 

https://source.codeaurora.org/external/imx/linux-imx/commit/?h=git.kernel.org/linux-stable/linux-5.0...

But newest post of git it will be modified to clear bit7 as following.

https://source.codeaurora.org/external/imx/linux-imx/commit/?h=git.kernel.org/linux-stable/linux-5.0...

Which is correct to set bit[7] = 1 or bit[7] = 0?

It have no information about this register address offset of 0x6C in reference manual.

I look forward to hearing from you.

Best regards,

Ishii.

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joanxie
NXP TechSupport
NXP TechSupport

1) yes

2) refer the "linux-imx - i.MX Linux kernel ":

Commit 18094430d6b5 ("mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fix") involve the fix of ERR004536, but the fix is incorrect.

 so pls refer to the latest patch, for the new patch, I have more detailed information as below:

pastedImage_2.png

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joanxie
NXP TechSupport
NXP TechSupport

1) yes

2) refer the "linux-imx - i.MX Linux kernel ":

Commit 18094430d6b5 ("mmc: sdhci-esdhc-imx: add ADMA Length Mismatch errata fix") involve the fix of ERR004536, but the fix is incorrect.

 so pls refer to the latest patch, for the new patch, I have more detailed information as below:

pastedImage_2.png

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takayuki_ishii
Contributor IV

Hello Joan,

Thank you for your quick response.

Now we use i.MX6QP and it have heavy bus traffic problem because it is using GPU/VPU and multi display.

So we concern the possibility of infringing on this errata.

By your answer, iMX6QP have no hardware fix and no software implement to fix it.

Does we need to apply the recommended workaround to prevent the occurrence of this erratum?

Best regards,
Ishii.

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joanxie
NXP TechSupport
NXP TechSupport

I got information:

"For imx6DQP, no need any change, .... because imx6DQP has the erratum, and do not has any IC fix."

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takayuki_ishii
Contributor IV

Hello Joan,

Thank you for  your quick response.

But I'm confusing now.

You say that "For imx6DQP, no need any change" mean that

imx6DQP do not have any IC fix, so it have no effect to write bit7 both 1(current) and 0(after patched).

Is it correct?

But iMX6DQP have original issue in errata because it do not have any IC fix.

So it have no software workaround both current source and new one because it is no effect to write bit7.

Is it correct?

For iMX6DQP, it is need to implement some workaround to fix this erratum.

Is it correct?

I look forward to hearing from you.

Best regards,

Ishii.

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joanxie
NXP TechSupport
NXP TechSupport

yes, you are right

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takayuki_ishii
Contributor IV

Hello Joan,

Thank you for  your quick response.

I understand current status of this errata.

Best regards,

Ishii.

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