Hi Community,
I have questions about HW_PINCTRL_EMI_DS_CTRL of i.MX28.
1. Do SLICE0_MA (bit1-0) and SLICE1_MA (bit3-2) set the drive strength of DQM0 and DQM1, too, as well as DQ[00:15],
or the drive strength of DQM is defined by CONTROL_MA (bit11-10)?
2. Which defines the drive strength of DQS/DQSN, DUALPAD_MA or SLICE1/0_MA?
I searched the log of the Community and found a post which mentions that SLICE is related to data, mask, strobe.
https://community.freescale.com/message/479777#479777
But since the description in 9.4.84 of RM shows that the drive strength of DQS/DQSN is set by DUALPAD_MA, I am not sure what SLICE is.
Could anyone please give me the answer to the questions above?
Thank you,
Hikaru Uruno
Solved! Go to Solution.
Hi Hikaru
1. yes DQM0 and DQM1 is set by SLICE0_MA
2. DQS/DQSN is set by DUALPAD_MA
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Hikaru
1. yes DQM0 and DQM1 is set by SLICE0_MA
2. DQS/DQSN is set by DUALPAD_MA
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Igor,
Thank you for the answers!
It looks strange that even though Figure 14-7 shows that DQSs are a part of the slices, the drive strength of DQSs is not defined by SLICEx_MA but by DUALPAD_MA...
Best regards,
Hikaru
Hi Hikaru
these are exceptions which are specially mentioned in
DUALPAD_MA description.
Best regards
~igor