Query on CSI Lanes in i.MX6Q

[vijaikumar]

Hi All,

We are planning to interface 2 CSI camera modules each with 2 data lanes to i.MX6Q processor (Camera#1:Dat0 and Dat1, Camera#2 :Dat2 and Dat3) and share the CSI lane Clock for both.

We will not use both the Camera's simultaneously.

Can we configure CSI data lanes Dat2 and Dat3 as lanes Dat0 and Dat1 respectively for the Camera#2? We plan to reuse the same Camera module as Camera#1 for Camera#2.

Is there any way we can inform the processor about this lane allocation?

[kenyung]

Hi All,

   May I ask a question?  I'd like to use 2 1080p MIPI cameras  to i.MX6Q, is it possible to use it as follow:

1.  two cameras use the same CLK LANE;
2. two cameras work at the same time;
3.   camera No.1 use the data lane 0~1, Camera No.2 use the data lane 2~3.

If it is feasiable， how to use the the same CLK LANE? is there a special chip to seperate one clk lane to two?

[Yuri]

  I expect the MIPI CSI-2 interface of the i.MX6 is considered in the thread.
Strictly speaking the mentioned configuration (common clock, two pairs of

data lines from one camera and other two pairs – from the second) is not supported

by the i.MX6 CSI-2 Host Controller, since all the data lines relates to single

camera. Nevertheless Your connection scheme may be implemented, assuming

that only one camera is enabled at time, and the first camera is configured for

two-bits data bus, and the second - for the 4-bits. For the second camera, the

low two bits should be rejected later in software. It may provide some performance

degradation.

Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[vijaikumar]

Dear Yuri ,

                                To make things more clear, I have attached the below image. Following is my understanding from your statement.

1. We can connect a 2 lane camera to CSI_D2P/M and CSI_D3P/M provided no camera is connected on CSI_D0P/M and CSI_D1P/M.
2. We have to enable all the four lanes by setting N_LANES as 11 in MIPI_CSI_N_LANES register of i.MX6Q.
3. Reject the lower two lanes of data in software.

Is my above interpretation of your statement correct? Kindly correct me if I am wrong.

Thanks

Vijai

[Yuri · Accepted solution]

After some analysing I conclude, that this is impossible to use two MIPI cameras

connected to the MIPI CSI-2 interface of the i.MX6. Because all data lines are used

in complicated MIPI protocol, we cannot split it between two cameras.

Regards,

Yuri.

[vijaikumar]

Thanks Yuri . Thank you for your support :smileyhappy: