Hi All,
I am trying to port the QNX BSP for IMX53 QSB; I was able boot the image from the sdcard. But it is stuck in endless loop for I2C read write error.
I am getting this following messages...can anyone please help on how to proceed further?
Thanks
Swamy
==========================================================================
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_write_register i2c write failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_write_register i2c write failed (code 5) |
Starting SPI driver for CSPI (dev/spi0) ...
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Starting Enhanced SPI driver for ECSPI1(dev/spi1) ...
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Starting Enhanced SPI driver for ECSPI2(dev/spi2) ...
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Starting SSI Audio driver for SGTL5000 ...
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Starting USB Host drivers (upper + lower ports) ...
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 5 100 cam-disk.so (Jun 15 2012 04:46:05) | |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Path=0 - FREESCALE MX35 e
target=0 lun=0 | Direct-Access(0) - SD:27 00000 Rev: 1.0 | ||
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:15 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:15 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:15 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:15 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:16 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:16 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:16 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:16 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Starting Graphics driver ...
Jan 01 00:00:16 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:16 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:16 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:16 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Starting SGX GPU driver...
Jan 01 00:00:16 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:16 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:16 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:16 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:16 | 2 | 6 | 0 Master send did not terminate |
Jan 01 00:00:16 | 2 | 6 | 0 Master send NACK |
Jan 01 00:00:16 | 5 | 9 | 1 mc34708_comms i2c_write_read failed (code 5, rbytes 0) |
Jan 01 00:00:16 | 2 | 9 | 1 mc34708_comms_read_register i2c write read failed (code 5) |
Jan 01 00:00:16 | 2 | 6 | 0 Master send did not terminate |
Solved! Go to Solution.
You would have to ask that in the QNX community. I posted a link above for the document they provide for the 53 QSD. There are buildfile commands. You'll probably need a QNX license to create the needed OS stack. From wht I can see in the documentation the driver for the mc34708 is in QNX Neutrino 6.5.0 - release 1.30.
Release note : http://www.google.com/url?url=http://community.qnx.com/sf/wiki/do/viewPdf/projects.bsp/wiki/Freescal...)
Is the proper driver loaded for the mc34708? Does the Linux image show similar errors? This type of error occurs when the i2c driver attempts to 'talk' to the chip, and there is no response from the chip.
If the Linux image works without problem then this would point to the wrong driver being loaded in the QNX stack
If the Linux image has a similar error then there is also the possibility that the bootloader or the bootlaoder parameters are not set up properly and the i2c master is not communicating as it should. See http://community.qnx.com/sf/sfmain/do/downloadAttachment/projects.bsp/wiki/Nto650FreescaleI.mx53QsbR...
Thanks for the reply.
Yes Linux image works fine. How shall I fetch the QNX I2C driver for mc34708? Also is there anyway I can bypass and check?
Thanks
Swamy
You would have to ask that in the QNX community. I posted a link above for the document they provide for the 53 QSD. There are buildfile commands. You'll probably need a QNX license to create the needed OS stack. From wht I can see in the documentation the driver for the mc34708 is in QNX Neutrino 6.5.0 - release 1.30.
Release note : http://www.google.com/url?url=http://community.qnx.com/sf/wiki/do/viewPdf/projects.bsp/wiki/Freescal...)
karinavalencia, Can you please review this topic?