Problem Configuring GPIO L5.4 on I.MX6UL-EVK

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Problem Configuring GPIO L5.4 on I.MX6UL-EVK

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2,924件の閲覧回数
jayhunt1
Contributor II

Hi,

I'm having problems configuring the GPIO on my imx6ul-evk... I've built L5.4.3 as follows:

$ repo init -u https://source.codeaurora.org/external/imx/imx-manifest -b imx-linux-zeus -m imx-5.4.3-1.0.0.xml
$ repo sync  
$ DISTRO=fsl-imx-fb MACHINE=imx6ulevk source imx-setup-release.sh -b build-fb
//Added imx-test utilities to local.conf
$ bitbake core-image-base

I uploaded the core-image-base-imx6ulevk.wic.bz2 image on to the sdcard and booted the imx6ul-evk.  At the u-boot prompt I did: 

=>setenv fdt_file imx6ul-14x14-evk.dtb

=>saveenv

and rebooted.

I'm using the imx6ul-14x14-evk.dtb that is the default for L5.4.3.1.

The problem is that when I try to configure GPIO using sysfs, with 

echo 115 > /sys/class/gpio/export

the GPIO port is not listed in $ ls /sys/class/gpio afterwards.

I'm having the same problem as in Simple GPIO Example - quandry  and usedBiyongSUN's example using memtool to check the IOMUX:

 

One important thing, you need to check the IOMUX you configured is correct for GPIO.

 

root@imx6qdlsolo:~# echo 115 > /sys/class/gpio/export
root@imx6qdlsolo:~# /unit_tests/memtool 0x20a8004 1
E
Reading 0x1 count starting at address 0x020A8004

0x020A8004:  0E050000

However the result I get is 

root@imx6ulevk:/unit_tests# ./memtool 0x20a8004 1
E
Reading 0x1 count starting at address 0x020A8004

0x020A8004: 00800400

I'm a bit new to linux on embedded systems ... where should I start to debug this?

Thanks,

Jay

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1 解決策
2,698件の閲覧回数
shivanipatel
Senior Contributor II

Hi jayhunt1‌,

Are you trying to export or access GPIO4_IO19, right?

If so, then this pin has been configured as a "CSI_VSYNC" in CSI module of imx6ul EVK.

So, to use this pin as a GPIO, you need to first disable the node in which this pin-muxing is used and after that you need to configure this pin as a gpio in device tree.

This "CSI_VSYNC" pin-muxing has been defined in the i2c2 node in "imx6ul-14x14-evk.dtsi" device tree file. So I have disabled this node in device tree and configure this pin-muxing as GPIO as shown in below screenshots.

Screenshot from 2020-05-12 16-52-19.png      Screenshot from 2020-05-12 16-52-44.png

By doing the above configurations, I am able to export the GPIO pin 115 on the board.

Hope this will help you.

Let us know if you have any query regarding this.

Regards,

Shivani

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2,699件の閲覧回数
shivanipatel
Senior Contributor II

Hi jayhunt1‌,

Are you trying to export or access GPIO4_IO19, right?

If so, then this pin has been configured as a "CSI_VSYNC" in CSI module of imx6ul EVK.

So, to use this pin as a GPIO, you need to first disable the node in which this pin-muxing is used and after that you need to configure this pin as a gpio in device tree.

This "CSI_VSYNC" pin-muxing has been defined in the i2c2 node in "imx6ul-14x14-evk.dtsi" device tree file. So I have disabled this node in device tree and configure this pin-muxing as GPIO as shown in below screenshots.

Screenshot from 2020-05-12 16-52-19.png      Screenshot from 2020-05-12 16-52-44.png

By doing the above configurations, I am able to export the GPIO pin 115 on the board.

Hope this will help you.

Let us know if you have any query regarding this.

Regards,

Shivani

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

2,698件の閲覧回数
weidong_sun
NXP TechSupport
NXP TechSupport

@Shivani Patel,

Yes, good job!

Have a nice day!

B.R,

weidong

2,698件の閲覧回数
jayhunt1
Contributor II

Thank you shivanipatel and weidong.sun; but what is the logic to know GPIO4_IO19 is mapped to i2c2?

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi Jay,

   GPIO4_19 can't be mapped to I2C2, About signals' mapping , you can get all infromation from i.MX6UL Rreference manual.

pastedImage_1.png

this means I2C2_SCL can be routed to one of 3 pads: CSI_HSYNC or GPIO1_IO00 or UART5_TX_DATA, and I2C2_SDA also has 3 options.

Have a nice day!

B.R,

Weidong

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jayhunt1
Contributor II

Thanks Wigros -  That clears it up for me!

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