Power domain of PCIE_REXT pin

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Power domain of PCIE_REXT pin

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Kazuma_Sasaki
Senior Contributor I

From Table 114. 21 x 21 mm functional contact assignments in IMX8DXAEC Rev. 1, 5/2019

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From Table 113. 21 x 21 mm power supplies contact assignments in IMX8DXAEC Rev. 1, 5/2019

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From Schematics of MCIMX8QXP-CPU MEK platform (SPF-29683-C2.pdf)

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Please let me confirm following points.

Q1. PCIE_REXT pin belong to VDD_PCIE0_1P0 according to table 114's description.

but, I could not find same name in Table 113. Which name is correct information for power domain of PCIE_REXT pin?

Q2. I am guessing PCIE_REXT and PCIE0_PHY_PLL_REF_RETURN pins belong to VDD_PCIE_LDO_1P0.

But, current schematics seems both pins pull-up to VDD_PCIE_1P8. is it correct? or should we pull-up to any other 1V0 power?

Best Regards,

Kazuma Sasaki.

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi

Q1. PCIE_REXT pin belong to VDD_PCIE0_1P0 according to table 114's description.

but, I could not find same name in Table 113. Which name is correct information for power domain of PCIE_REXT pin?

This pin is the resistor external of the PCIe interface, which is used to connect a resistor. This resistor is used to adjust the differential impedance of the PCIe signal.

pastedImage_1.png

Above Pins listed in table 113 are all Power pins, but PCIE_REXT is not power pin.  In table 114, it means PCIE_REXT pin is in VDD_PCIE0_1P0 domain.

Q2. I am guessing PCIE_REXT and PCIE0_PHY_PLL_REF_RETURN pins belong to VDD_PCIE_LDO_1P0.

But, current schematics seems both pins pull-up to VDD_PCIE_1P8. is it correct? or should we pull-up to any other 1V0 power?

See schematic carefully, please!  These 2 pins are not pulled up to HIGH! C376 & C375 are not resistors.

Have a nice day!

BR,

Weidong

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi

Q1. PCIE_REXT pin belong to VDD_PCIE0_1P0 according to table 114's description.

but, I could not find same name in Table 113. Which name is correct information for power domain of PCIE_REXT pin?

This pin is the resistor external of the PCIe interface, which is used to connect a resistor. This resistor is used to adjust the differential impedance of the PCIe signal.

pastedImage_1.png

Above Pins listed in table 113 are all Power pins, but PCIE_REXT is not power pin.  In table 114, it means PCIE_REXT pin is in VDD_PCIE0_1P0 domain.

Q2. I am guessing PCIE_REXT and PCIE0_PHY_PLL_REF_RETURN pins belong to VDD_PCIE_LDO_1P0.

But, current schematics seems both pins pull-up to VDD_PCIE_1P8. is it correct? or should we pull-up to any other 1V0 power?

See schematic carefully, please!  These 2 pins are not pulled up to HIGH! C376 & C375 are not resistors.

Have a nice day!

BR,

Weidong

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Kazuma_Sasaki
Senior Contributor I

Hi Weidong,

I appreciate your support. I got it.

Best Regards,

Kazuma Sasaki.

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