Power Saving for SDIO controller in suspend mode

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Power Saving for SDIO controller in suspend mode

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bensonyoung
Contributor I

Hello,

We are using iMX7D as the main processor on our platform. The platform uses SDIO bus to interface a WiFi card. and has battery backup power when DC power supply is not detected.

During battery operation, we would like to power down SDIO to conserve power.

From i.MX 7Dual Applications Processor Reference Manual Section 10.3.4.8 states

   The uSDHC offers a power management feature. By clearing the clock enabled bits in the
   System Control Register, the clocks are gated in the low position to the uSDHC. For
   maximum power saving, the user can disable all the clocks to the uSDHC when there is
   no operation in progress.

How do we go about disabling the clock from Linux application? (suppose the client is connected to SD2 bus, mmc1)

If the CPU is suspended with command

   echo mem > /sys/power/state

does it shut down the SDIO clock?

From Documentation/devicetree/bindings/mmc/mmc.txt

   Optional SDIO properties:
   - keep-power-in-suspend: Preserves card power during a suspend/resume cycle

does this mean, if this flag is not set in the device tree, SDIO controller will not be powered during CPU suspend? and power will only be present when CPU resumes from suspended state?

thank you for your help

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2,143 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Benson

clocks behaviour in low power modes is configured through CCGR described in

sect.5.2.7.2 PLL Interface i.MX 7Dual Applications Processor Reference Manual

Regarding "SDIO controller will not be powered during CPU suspend?" -

power supplies usage in low power modes  is decribed in

sect.4.1.6.5 Low Power Mode i.MX 7Dual Family of Applications Processors Datasheet

"Except the VDD_ARM, the other power rails have to keep active in SUSPEND mode.'

Best regards
igor
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