Porting pcam5c in imx8mq

[redwill]

Hi：

    I'm trying to port pcam5c camera to imx8mq with Linux4.14.98. Similiar to this article
    https://community.nxp.com/t5/i-MX-Processors/porting-hm5065-in-imx8mm/m-p/945766/highlight/true

    My situation now is: i can see the data and clock lane signal from pcam5c when starting up the gst-lauch process, but the clock lane have no more signal soon, is there anything wrong or missed?

    And I try follow the log, found that process get stuck, since "select" found no data and DID NOT call "ioctl:VIDIOC_DQBUF"

    My question are

• As description above, why the clock no more signal?
• I am not quite sure these clock fields meaning in device tree, and what should I notice when porting?
• The pcam camera have 2 data-lane + 1 clock-lane, how should I modify the clock and data lane?

        clocks = <&clk IMX8MQ_CLK_CLKO2>;                          // <= not sure what is means
        clock-names = "csi_mclk";
        assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>,           // <= not sure what is means
                  <&clk IMX8MM_CLK_CLKO1_DIV>;                      // <= not sure what is means
        assigned-clock-parents = <&clk IMX8MQ_CLK_200M>;  // <= not sure what is means
        assigned-clock-rates =  <12000000>;
        csi_id = <0>;
        mclk = <12000000>;
        mclk_source = <0>;
        ...

   Similar at mxc-mipi-csi2_yav

clocks = <&clk IMX8MQ_CLK_DUMMY>,                                           // <= not sure what is means
<&clk IMX8MQ_CLK_CSI1_CORE>,                                                  // <= not sure what is means
<&clk IMX8MQ_CLK_CSI1_ESC>,                                                     // <= not sure what is means
<&clk IMX8MQ_CLK_CSI1_PHY_REF>;                                            // <= not sure what is means
clock-names = "clk_apb", "clk_core", "clk_esc", "clk_pxl";                   // <= not sure what is means
assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE>,                     // <= not sure what is means
<&clk IMX8MQ_CLK_CSI1_PHY_REF>,                                             // <= not sure what is means
<&clk IMX8MQ_CLK_CSI1_ESC>;                                                      // <= not sure what is means
assigned-clock-rates = <133000000>, <100000000>, <66000000>;   // <= not sure what is means

• As the content from the linking the testing tool: /unit_tests/V4L2/mx6s_v4l2_capture.out, how can I found? or compile it?

Thank you

[jimmychan]

These is the clock root, clock source and clock rate settings. You can refer to the Chapter 5 CCM in the i.MX8MQ Reference Manual for more details. 

There is a chapter talk about the camera porting.

Attached is the porting guide for your information.