Platfrom SDK RGMII AR8031 G-Ethernet Test fail

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Platfrom SDK RGMII AR8031 G-Ethernet Test fail

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m_c
Senior Contributor I

We made an Ethernet loopback cable (1-3, 2-6, 4-7 & 5-8) according to <How to wire a ethernet loop back adaptor or cable | Malcolm's Tech Tips>, and running Platform SDK v1.1.0 output/mx6dq/obds/smart_device_rev_c/obds.bin on i.MX6Q-SDP. We running Ethernet loopback fail as below, but same board can load uImage and mount nfs as rootfs via same Ethernet port. Is there anything we can check?

  ---- Running < RGMII AR8031 G-Ethernet Test >

  Would you like to run the Ethernet loopback test?

    (Please note that in order to run the test, you need to

     first plug in a loopback cable to the Ethernet port.)

  Please enter y or Y to confirm.

y

ENET AR8031 PHY: ID=4dd070

enet phy status 1: 7949

AR8031 reg 0x11 = 0010

  ENET link status check failed.

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maximkuk
Contributor III

Hello!
I faced with the same problem in our custom board and I solved it!

As igorpadykov said  we need to configure ar8031 to external loopback mode:
1. plug in loopback cable
2. disable hibernate and enable ext loopback
3. set register 0x0 to proper value.
To do so we need to apply patch to enet_drv.c:

diff --git a/sdk/drivers/enet/src/enet_drv.c b/sdk/drivers/enet/src/enet_drv.c
index 7d8c0b2..d2ba0ca 100644
--- a/sdk/drivers/enet/src/enet_drv.c
+++ b/sdk/drivers/enet/src/enet_drv.c
@@ -457,6 +457,9 @@ void imx_enet_phy_enable_external_loopback(imx_enet_priv_t * dev)
val |= 0x0001; // enable ext loopback
imx_enet_mii_write(dev->enet_reg, dev->phy_addr, 0x1e, val);
}
+
+ // 1000M loopback mode
+ imx_enet_mii_write(dev->enet_reg, dev->phy_addr, 0x0, 0x8140);
}

And in test code we need to wait until link up (just like in ping unit test).

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi m.c.

from AR8031 FAQ:

How to set external loopback?

Answer:

1. Plug in an external loopback cable (1-3/2-6/4-7/5-8).

2. Config Dbg0xb[15]=0 disable hibernate(power saving mode),

Dbg0x11[0]=1 enable external loopback,

3. For 1000M Config: Preg0=0x8140 to set1000M and software reset

For 100M Config Preg0=0xA100 to set100M and software reset

For 10M Config Preg0=0x8100 to set10M and software reset

Notes:When re-plugs the cable in 1000M mode, need to write Preg0=0x8140 again to make the PHY link.

Need a software or hardware reset to make the PHY out of the loopback mode.

Dbg0xb means debug register whose offset address is 0xb.

Preg0 means basic register 0.

Additionally one can tweak delays

AR8031 TX_CLK dleays.jpg

lastly one can printf AR8031 and i.MX6 ENET registers in Uboot and set the

same values in SDK.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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m_c
Senior Contributor I

We apply below patch as suggestion and run test again. We found Dbg0x11[0] can't set to 1. Is this correct? BTW the test still fail in the end.

diff --git a/sdk/drivers/enet/src/enet_drv.c b/sdk/drivers/enet/src/enet_drv.c

index 7d8c0b2..c6aa718 100755

--- a/sdk/drivers/enet/src/enet_drv.c

+++ b/sdk/drivers/enet/src/enet_drv.c

@@ -273,6 +273,26 @@ void enet_phy_rework_ar8031(imx_enet_priv_t * dev)

        imx_enet_mii_read(dev->enet_reg, dev->phy_addr, 0x1e, &val);

        val |= 0x0100;

        imx_enet_mii_write(dev->enet_reg, dev->phy_addr, 0x1e, val);

+

+       /* https://community.freescale.com/message/504404#504404 */

+       /* Dbg0xb means debug register whose offset address is 0xb. */

+       /* Preg0 means basic register 0. */

+       /* Config Dbg0xb[15]=0 disable hibernate(power saving mode) */

+       imx_enet_mii_read(dev->enet_reg, dev->phy_addr, 0xb, &val);

+       printf("!!!!!! val=%04x\n", val);

+       val &= 0x7fff;

+       printf("!!!!!! val=%04x\n", val);

+       imx_enet_mii_write(dev->enet_reg, dev->phy_addr, 0xb, val);

+       imx_enet_mii_read(dev->enet_reg, dev->phy_addr, 0xb, &val);

+       printf("!!!!!! Dbg0xb=%04x\n", val);

+       /* Dbg0x11[0]=1 enable external loopback */

+       imx_enet_mii_read(dev->enet_reg, dev->phy_addr, 0x11, &val);

+       printf("!!!!!! val=%04x\n", val);

+       val |= 0x1;

+       printf("!!!!!! val=%04x\n", val);

+       imx_enet_mii_write(dev->enet_reg, dev->phy_addr, 0x11, val);

+       imx_enet_mii_read(dev->enet_reg, dev->phy_addr, 0x11, &val);

+       printf("!!!!!! Dbg0x11=%04x\n", val);

#endif

ENET AR8031 PHY: ID=4dd070

!!!!!! val=0000

!!!!!! val=0000

!!!!!! Dbg0xb=0000

!!!!!! val=0010

!!!!!! val=0011

!!!!!! Dbg0x11=0010

enet phy status 1: 7949

AR8031 reg 0x11 = 0010

  ENET link status check failed.

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m_c
Senior Contributor I

Hello Igor,

Since it's an FAQ. Is there any patch for Platform SDK 1.1.0? or any plan to fix in next Platform SDK?

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi m.c.

I am afraid not.

Best regards

igor

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