Hello,
I’ve noticed some discrepancies between the pin naming/assignment in the datasheet for the MIMX8ML8DVNLZAB processor and the schematic of the 8MPLUSLPD4-CPU evaluation board. Specifically, certain power pins (like VDD_SOC_17) are assigned to different locations.
What could be the reason for this difference?
If anyone has experienced this or can provide clarification, I’d appreciate your help.
Thank you!
eva board compute module
Datasheet MIMX8ML8DVNLZAB
Hello,
Here I think there is a little confusion on your side, please note that all 35 VDD_SOC pads are tied together on the EVK, so in your design it should be the same, no matter the pad number on the schematic since all are VDD_SOC.
Best regards/Saludos,
Aldo.