PWM signals disappear when i.MX8 MM processor is idle.

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PWM signals disappear when i.MX8 MM processor is idle.

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MaxL
Contributor I

Our product uses the imx8mm chip. The M4 core is used to generate PWM signals and operates independently from Linux. The PWM signals are stable while Linux is not loaded. After Linux loads, the PWM signal starts disappearing when the main A53 core is idle. If I run a program that creates 100% load for the main core, the PWM signal is okay. It looks like the A53 disables clock or sends PWM to some low power mode while it is in wait mode.

I observed the issue on the expample project from SDK 2.8.0 (boards/evkmimx8mm/driver_examples/pwm).

I tried to enable the clock in the M4 firmware to BOARD_BootClockRUN() functions with no effect.

CLOCK_EnableClock(kCLOCK_Pwm1);
CLOCK_EnableClock(kCLOCK_Pwm2);
CLOCK_EnableClock(kCLOCK_Pwm3);
CLOCK_EnableClock(kCLOCK_Pwm4);
CLOCK_EnableClock(kCLOCK_Gpio1);
CLOCK_EnableClock(kCLOCK_Gpio5);

Also, modified the device tree file to make sure Linux doesn't touch PWMs.

Spoiler
+/ {
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ m4_reserved: m4@80000000 {
+ no-map;
+ reg = <0 0x80000000 0 0x1000000>;
+ };
+
+ };
+};
+
+&mu {
+ status = "okay";
+};
+
+&rpmsg{
+ /*
+ * 64K for one rpmsg instance:
+ * --0xb8000000~0xb800ffff: pingpong
+ */
+ vdev-nums = <1>;
+ reg = <0x0 0xb8000000 0x0 0x10000>;
+ status = "okay";
+};
+
+&uart4 {
+ status = "disabled";
+};
+
+&i2c3 {
+ status = "disabled";
+};
+
+&pwm1 {
+ status = "disabled";
+};
+
+&pwm2 {
+ status = "disabled";
+};
+
+&pwm3 {
+ status = "disabled";
+};
+
+&pwm4 {
+ status = "disabled";
};
+
+/*
+ * ATTENTION: M4 may use IPs like below
+ * ECSPI0/ECSPI2, GPIO1/GPIO5, GPT1, I2C3, I2S3, WDOG1, UART4, PWM3, SDMA1
+ */
+
+&clk {
+ init-on-array = <IMX8MM_CLK_UART4_ROOT
+ IMX8MM_CLK_AHB IMX8MM_CLK_DRAM_CORE
+ IMX8MM_CLK_NOC IMX8MM_CLK_NOC_APB
+ IMX8MM_CLK_USB_BUS
+ IMX8MM_CLK_MAIN_AXI IMX8MM_CLK_AUDIO_AHB
+ IMX8MM_CLK_DRAM_APB IMX8MM_CLK_A53_DIV
+ IMX8MM_ARM_PLL_OUT IMX8MM_CLK_DISP_AXI
+ IMX8MM_CLK_DISP_APB
+ IMX8MM_CLK_PWM1_ROOT
+ IMX8MM_CLK_PWM2_ROOT
+ IMX8MM_CLK_PWM3_ROOT
+ IMX8MM_CLK_PWM4_ROOT
+ >;
+};
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1 Solution
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igorpadykov
NXP TechSupport
NXP TechSupport

Hi MaxL

 

one can look at sect.12.2.6.1 PWM Control Register (PWMx_PWMCR),

WAITEN - Wait Mode Enable. This bit keeps the PWM functional in wait mode.

i.MX 8M Mini Applications Processor Reference Manual

 

Best regards
igor

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2 Replies
391 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi MaxL

 

one can look at sect.12.2.6.1 PWM Control Register (PWMx_PWMCR),

WAITEN - Wait Mode Enable. This bit keeps the PWM functional in wait mode.

i.MX 8M Mini Applications Processor Reference Manual

 

Best regards
igor

363 Views
MaxL
Contributor I

@igorpadykovThank you for the quick reply.

It works like a charm!

PWM_GetDefaultConfig(&pwmConfig);
pwmConfig.enableWaitMode = true;                           // <-- Changed this default value to 'true'
PWM_Init(DEMO_PWM_BASEADDR, &pwmConfig);

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