PMU_REG_2P5[ENABLE_WEAK_LINREG] bit in i.MX6SDL.

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PMU_REG_2P5[ENABLE_WEAK_LINREG] bit in i.MX6SDL.

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keitanagashima
Senior Contributor I

Dear Sir or Madam,

Hello.

Refer to "51.3.2.1 Low Power Operation" in IMX6SDLRM(Rev.1).

There is description of "PMU_REG_2P5[ENABLE_WEAK_LINREG] bit".

But, I couldn't find this register.

On the one hand, I found this register in "50.7 PMU Memory Map/Register Definition" of IMX6DQRM(Rev.2).

[Question]

Why does not the "PMU_REG_2P5[ENABLE_WEAK_LINREG] bit" exist?

Does this bit exist?

Best regards,

Keita

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igorpadykov
NXP Employee
NXP Employee

Hi Keita

yes, exists please refer to attached

rev.2 Manual which soon wil be released.

Best regards

chip

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igorpadykov
NXP Employee
NXP Employee

Hi Keita

yes, exists please refer to attached

rev.2 Manual which soon wil be released.

Best regards

chip

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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keitanagashima
Senior Contributor I

Dear chip,

Thank you for your prompt reply.

OK. I got it.

Best Regards,

Keita

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