PMIC_ON_REQ design on i.MX7 SABRE.

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PMIC_ON_REQ design on i.MX7 SABRE.

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satoshishimoda
Senior Contributor I

Hi community,

Our customer have a question about i.MX7 SABRE board.
Please see the following image, it shows the connection of PMIC_ON_REQ signal.

IMG_0298.JPG


PMIC_ON_REQ is push-pull output from Table 8 in IMX7DSHDG Rev.0, and RESET_B of reset IC is open-drain from TPS3808 datasheet.
If i.MX7 output PMIC_ON_REQ as High and reset IC output output RESET_B as low at the same time, we think output collision will be occurred and short will be also occurred as the red route on the following image.

IMG_0298_2.jpg
So pull-down resistor should be added between PMCI_ON_REQ and RESET_B (at the black square).
Is our understanding correct?
Or the SABRE shematic is no problem with some reason?


Best Regards,
Satoshi Shimoda

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863 次查看
art
NXP Employee
NXP Employee

Yes, you are right. R307 should be either not populated or be at least some 1 to 10 kOhm resistor to prevent extra current drain when the external watchdog Reset signal goes Low.


Have a great day,
Artur

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864 次查看
art
NXP Employee
NXP Employee

Yes, you are right. R307 should be either not populated or be at least some 1 to 10 kOhm resistor to prevent extra current drain when the external watchdog Reset signal goes Low.


Have a great day,
Artur

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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satoshishimoda
Senior Contributor I

Hi Artur,

OK, we understood.

And please tell this problem to your SABRE development team to fix this problem on next revision.

Best Regards,

Satoshi Shimoda

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