PMIC_ON_REQ Control for I.MX93 with PCA9451

[Chou]

Dear NXP Community,

We would like to inquire about the control mechanism of the PMIC_ON_REQ signal for the I.MX93, as we are using the PCA9451 PMIC along with the I.MX9322CVX. Below are our specific questions:

1. During Power-up
   When we supply the NVCC_BBSM_1P8 voltage, the PMIC_ON_REQ signal automatically goes high. This signal is connected to the PMIC to initiate the power-on sequence. Is this understanding correct?

2. During Power-down
   Can we use software to pull the PMIC_ON_REQ signal low to allow the PMIC to enter the power-down process?

   • If so, how can this be achieved?
   • Where can we find the relevant process or documentation?

3. Battery Power Detection
   Our battery is designed to detect the operational state of the I.MX93. When the I.MX93 powers down, the battery will automatically turn off the power.

   • Is there a recommended pin to monitor this state (either from the I.MX93 or the PCA9451)?

   3.1 If the battery has not yet disconnected power, but the PMIC has completed the power-down process, at this moment NVCC_BBSM_1P8 is still being supplied by the battery. Will the PMIC_ON_REQ signal automatically be pulled high again?

Thank you for your support and clarification.

Best regards,

[Chou]

Hi Joseph,

Thank you for your reply to the previous questions.

I’d like to rephrase Question 3 for clarity and expand on my inquiries:

1. Which pin on the processor or PMIC can notify other devices when the processor is fully powered up or powered down?
   This information is crucial as I need to know when it is safe to cut the power.

2. I would like to know the logic of PMIC_ON_REQ,
   this is the power down sequence we are referring to:

   1. A shutdown is triggered b software: NVCC_BBSM_1P8 remains high / PMIC_ON_REQ is triggered to low
      → PMIC enters the power-down process.

   2. The I.MX93 begins the power-down process.

   3. The I.MX93 shuts down while NVCC_BBSM_1P8 remains high, since the battery power is not cut down yet.
      
      What is the state of PMIC_ON_REQ at the moment?
      -> If PMIC_ON_REQ returns to high, does this mean it’s not possible to fully shut down the I.MX93?
      -> If PMIC_ON_REQ stays low, what is the logic that triggers PMIC_ON_REQ to go high when powering up? Is it tied to the transition of NVCC_BBSM_1P8 from unpowered to powered

3. We noticed in the EVK design that the I.MX93’s PMIC_ON_REQ is not connected to the PMIC. Could you help clarify the reasoning behind this design choice?
   

I’d greatly appreciate your insights on these points.

[JosephAtNXP · Accepted solution]

Hi Chou,

1. For i.MX power-up, you can go with the POR_B signal from the processor, the last stage is POR_B release (it should be asserted during the entire power-up sequence). For power-down, there are no exact signal and you could keep with POR_B signal, you should just add the steps and delay the cutoff the result of all the steps until VDD_SOC is released.

2. The second situation If PMIC_ON_REQ stays low, what is the logic that triggers PMIC_ON_REQ to go high when powering up? Is it tied to the transition of NVCC_BBSM_1P8 from unpowered to powered.

NVCC_BBSM_1P8 powering-up causes SRC to trigger PMIC_ON_REQ, during powerdown you will return to SNVS mode which allows you cut the power then.

3. I reviewed them and the signal is connected, please see below,

Regards,

[JosephAtNXP]

Hi,

Thank you for your interest in NXP Semiconductor products,

For question 1, you are right, for the PMIC side, you have to pass UVLO voltage so the PMIC is ready to initiate the power-up sequence. For the i.MX side, you have to power NVCC_BBSM_1P8 and the signal PMIC_ON_REQ will be triggered.

For question 2, yes, you could check this in EVK running the command, this sets the watchdog to expire and it's a cold reset source.

shutdown now

For question 3, using a battery-powered application is supported for the PMIC and the processor, nevertheless, no monitoring/management circuit is implemented, you would need to manage the battery with an additional circuitry.

For question 3.1, correct, PMIC_ON_REQ can control power-up and power-down multiple times, if you want the application not to power up constantly, you can go with the off-state of the PMIC option.

Regards