PMIC MMPF0100 Vin Vs Vout

cancel
Showing results for
Did you mean:
SOLVED

PMIC MMPF0100 Vin Vs Vout

523 Views
Contributor IV

Hi, I am making design based on i.MX6D and I have used PMIC as MMPF0100A. As per datasheet of MMPF0100A, it shows Vin range between 2.8V to 4.5V for 14 Output (Switchers and LDOs). What will be the output voltage of all Switcher and LDOs, if the Vin is below 2.8V? What will be the output voltage of all Switcher and LDOs, if the Vin is below 3.0V? Regards, Mrudang

Labels (2)

• PMIC

Tags (2)
1 Solution
243 Views
NXP TechSupport

Hi Mrudang

when Vin is below 2.8V output voltage will follow input provided conditions

mentioned in MMPF0100 Datasheet Table 63. SW2 Electrical Characteristics :

Footnote 46. "When output is set to > 2.6 V the output will follow the input down when VIN gets near 2.8 V."

and Table 104. VGEN3 Electrical Characteristics

Footnote 63. "When the LDO Output voltage is set above 2.6 V, the minimum

allowed input voltage needs to be at least the output voltage plus 0.25 V, for proper

regulation due to the dropout voltage generated through the internal LDO transistor."

http://cache.freescale.com/files/analog/doc/data_sheet/MMPF0100.pdf

That is for normal operation switcher should has 0.2V and LDO 0.25V difference

between input and output voltages

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

-----------------------------------------------------------------------------------------------------------------------

4 Replies
244 Views
NXP TechSupport

Hi Mrudang

when Vin is below 2.8V output voltage will follow input provided conditions

mentioned in MMPF0100 Datasheet Table 63. SW2 Electrical Characteristics :

Footnote 46. "When output is set to > 2.6 V the output will follow the input down when VIN gets near 2.8 V."

and Table 104. VGEN3 Electrical Characteristics

Footnote 63. "When the LDO Output voltage is set above 2.6 V, the minimum

allowed input voltage needs to be at least the output voltage plus 0.25 V, for proper

regulation due to the dropout voltage generated through the internal LDO transistor."

http://cache.freescale.com/files/analog/doc/data_sheet/MMPF0100.pdf

That is for normal operation switcher should has 0.2V and LDO 0.25V difference

between input and output voltages

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

-----------------------------------------------------------------------------------------------------------------------

243 Views
Contributor IV

Hi Igor,

What will be the output voltage of all Switchers and all LDOs, if the Vin =2.8V,  3.0V  and 3.3V?

Regards,

Mrudang

243 Views
Contributor IV

Hi Igor,

As you said "That is for normal operation switcher should has 0.2V and LDO 0.25V difference between input and output voltages".

Does it applicable for all 6 Switcher and 6 LDO Output of PMIC?

Regards,

Mrudang

243 Views
NXP TechSupport

Hi Mrudang

yes for all

Best regards

igor