PCIe : Phy link never came up

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PCIe : Phy link never came up

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pinkpr
Contributor II

Hi guys,

I'm currently implementing PCIe support on an iMX6DL based board. I let the stock device tree configuration, and I get this error log at boot : 

1ffc000.pcie supply pcie-bus not found, using dummy regulator
imx6q-pcie 1ffc000.pcie: phy link never came up
imx6q-pcie 1ffc000.pcie: failed to initialize host
imx6q-pcie: probe of 1ffc000.pcie failed with error -22

Does it mean that the iMX PCIe core isn't detected ?

I can't get rid of this error, and I can't find any working fix on the internet :-(

Have a nice day !

PinkPR

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2 Replies

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Ryze
Contributor I

Hi, Pinkpr

I met the same proplem.Did you fix this?

Could you please give me a solution for this.

 

Regards.

Wenqing

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1,948 Views
Yuri
NXP TechSupport
NXP TechSupport

Hello,

  Please look at my comments below.

 

1.

  Check PCie clock configuration, if it meets HW Design Checking List recommendations about using (external) PCIe

clock :

 "Due to CLKx_P/N is LVDS port and don't match with PCIe reference clock specification. For PCIe Gen1 application, following low cost solution can be used(DC bias and AC impedance should be considered). Please refer to "HW Design Checking List for i.Mx6DQSDL Rev3.1.xlsx", sheet "Schematic", Ref12 for more info."

 

  "PCIe reference clock solution which provided by CLKx_N/P of i.MX6 chip can't pass PCIe Gen2 compliance test. Recommend using external PCIe 2.0/3.0 clock generator with 2 HCSL outputs solution. One clock channel connect to i.MX6 as a reference input, please click Ref14 ("HW Design Checking List for i.Mx6DQSDL Rev3.1.xlsx") for reference circuit. Another clock channel should connect to PCIe connector, please contact generator vendor for detailed design guide."

 

HW_Design_Checking_List_for_i.MX6DQP6DQ6SDL 

 

The PCIe clock signal pair is not part of the PCIe PHY IP (assuming the CLK1N/P are used).

 They are configured via PMU_MISC1n register.

 

2.

  Use the recent NXP BXP.

https://www.nxp.com/webapp/Download?colCode=L4.9.11_1.0.0_LINUX_DOCS 

 

Summary page:

 

i.MX 6 / i.MX 7 Series Software and Development Tool|NXP 

 

3.

  Please try adjust parameters of PCIe_PHY by changing the IOMUXC_GPR8 register.

 

You may refer to app note

 

https://www.nxp.com/docs/en/application-note/AN4784.pdf 

 

for details.

Have a great day,
Yuri

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