PCIe Link not up on a Custom IMX6Q Board

[rajniks]

Hi,

I have a custom IMX6Q board in which I am not able to get PCIe up. I am using LTIB environment.

I have looked into other posts regarding the clock enable in RC mode, which seems to be enabled linux-3.0.35. I am trying to connect a dual port NIC card from Intel (0G174P) which is supported by the igb driver in kernel.

I always get this error during the kernel boot.

iMX6 PCIe PCIe RC mode imx_pcie_pltfm_probe entering.

PCIE: imx_pcie_pltfm_probe start link up.

link up failed, DB_R0:0x00d5f700, DB_R1:0x08200000!

IMX PCIe port: link down!

I had initially only connected  PCIe RX, TX and CLK (driven by IMX6). I tried connecting a GPIO for PCI_Reset but that didn't help my cause.

Can you please suggest me what should I do next in order to get PCIe interface checked out?

~Raj

[igorpadykov]

Hi Raj

you can try to connect in Gen1 mode:

How to force iMX6 PCIe into Gen 1 mode | Freescale Community

play with GPR8 PCIe phy levels   IMX6DQRM sect.36.4.9 GPR (IOMUXC_GPR8)

if issue is caused by noise, one can try SDK example running it from OCRAM

i.MX 6Series Platform SDK : Bare-metal SDK for the i.MX 6 series

iRAM (OCRAM) i.MX6 SDK Application

Also one can try to measure signals using

AN4784 AN4784: PCIe Certification Guide

Best regards

igor

[rajniks]

Hi Igor,

I looked at your suggested links. I don't have access to to high end scopes mentioned in the PCIe Express application notes.

Though I hooked up a Differential probe on the clock lines (I have disabled the code which that stops the clock if linkup fails) and can see 100MHz +/-500mV at the the connector. I am using u-boot-2009 and kernel 3.0.35 and having gone through many of the links on the community, looks like reset to the PCIe card and clock enable is important. I don't see that correlated as of now.

Also I would like to understand do we get a similar error if the driver for a certain end point is not available at the kernel level?

Thanks

Raj

[igorpadykov]

I think device should be detected, even there is no driver in kernel

Best regards

igor

[rajniks]

Hi Igor,

I have tried multiple things on two different custom cards, but the PCIe link is still not up

In Gen 2 mode I get the debug register values DB_R0:0x00d53500, DB_R1:0x08200000, DB_RO data bit changes to 0x0037c800 by introducing some more delays in pcie_link_up function

When configured to Gen1 mode as per the link you shared the debug register values are DB_R0:0x00983800, DB_R1:0x08200000

I did not get what you meant by play with GPR8 PCIe phy levels, what values should I change and to what. If you would like to recommend some values that will be great.

I have made the reset to PCIe proper which gets enabled after the clock is enabled and stable.

Thanks

Raj

[igorpadykov]

Hi Ray

GPR settings are described in

AN4784 AN4784: PCIe Certification Guide

~igor

[rajniks]

There was a link where someone faced similar issue and it seems got fixed with driver upgrade.

https://community.freescale.com/message/417588#417588

I will continue to look into the PCIe details further and see if init is not happening correctly.