PCA6416A Interrupt configuration in iMX8MM EVK

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PCA6416A Interrupt configuration in iMX8MM EVK

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sreedhar_appala
Contributor IV

Hi,

I am working with iMX8MM EVK and Yocto distribution 4.19.35 version

 

Build Configuration:
BB_VERSION = "1.42.0"
BUILD_SYS = "x86_64-linux"
NATIVELSBSTRING = "ubuntu-16.04"
TARGET_SYS = "aarch64-poky-linux"
MACHINE = "imx8mmevk"
DISTRO = "fsl-imx-xwayland"
DISTRO_VERSION = "4.19-warrior"
TUNE_FEATURES = "aarch64"
TARGET_FPU = ""

We have interfaced two keypad boards interfaced to the IMX8MMEVK to PCA6416 IO expander.

we have followed the steps mentioned in the below thread for setting up the GPIO1_IO12 interrupt line.

How to enable interrupts of EXP_GPIOs from PCA6416 in IMX8M Mini EVK 

From the datasheet of PCA6416A section 7.8 Interrupt output (INT)

"The INT output has an open-drain structure and requires pull-up resistor to VDD(P) or
VDD(I2C-bus) depending on the application. INT should be connected to the voltage source
of the device that requires the interrupt information"

https://community.nxp.com/thread/518153 

Frpm the above thread, we have enabled the pull-up resistor internally to GPIO1_IO12 in the fsl-imx8mm-evk.dts

pinctrl_i2c2_dev: mydev_iogrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12        0x14f   /* instead of 0x19 i programmed 0x14F */
>;
};

My first question:

Is my configuration of pad ctrl register value is correct? 0x14F, Please let me know, because i am yet to get the hw to test, before that i am making sure my driver code is perfect.

My second question:

The interrupt line GPIO1_IO12 is shared. The interrupt (Active Low) is generated whenever there is a state change at the EXP_IO Input Interrupt signals. I have registered the two irq handlers for IRQ_TYPE_LEVEL_LOW for GPIO1_IO12.

IRQ_Handler1   -  EXP_IO8 for Rising Edge

IRQ_Handler2   -  EXP_IO10 for Falling Edge

In the respective irq_handlers i will read the values of EXP_IO8 and EXP_IO10 for value and conclude on the edge.

is my understanding is correct?

Thank you, Sreedhar

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1 Solution
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igorpadykov
NXP Employee
NXP Employee

Hi Sreedhar

1. configuration of pad ctrl register value is correct.

2. I believe your understanding is correct.

Best regards
igor
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2 Replies
986 Views
igorpadykov
NXP Employee
NXP Employee

Hi Sreedhar

1. configuration of pad ctrl register value is correct.

2. I believe your understanding is correct.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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sreedhar_appala
Contributor IV

Thank you igor !!

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